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參數(shù)資料
| 型號： | ISL54047IRUZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX 4X1 10UTQFN |
| 標準包裝： | 3,000 |
| 功能： | 開關 |
| 電路： | 2 x SPST - NO |
| 導通狀態(tài)電阻： | 450 毫歐 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.65 V ~ 4.5 V |
| 電流 - 電源： | 100nA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應商設備封裝： | 10-UTQFN（1.8x1.40） |
| 包裝： | 帶卷 (TR) |
8
FN6503.0
May 31, 2007
the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch. Connecting schottky
diodes to the signal pins as shown in Figure 8 will shunt the
fault current to the supply or to ground thereby protecting the
switch. These schottky diodes must be sized to handle the
expected fault current.
Power-Supply Considerations
The ISL54047 construction is typical of most single supply
CMOS analog switches, in that they have two supply pins:
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL54047 5.5V
maximum supply voltage provides plenty of room for the
10% tolerance of 4.3V supplies, as well as room for
overshoot and noise spikes.
The minimum recommended supply voltage is 1.65V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
to the Electrical Specification Tables on page 5 and Typical
Performance Curves on page 9 for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family are 1.8V CMOS compatible (0.5V and
1.4V) over a supply range of 2.7V to 4.5V (see Figure 18). At
2.7V the VIL level is about 0.53V. This is still above the 1.8V
CMOS guaranteed low output maximum level of 0.5V, but
noise margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
The ISL54047 has been designed to minimize the supply
current whenever the digital input voltage is not driven to the
supply rails (0V to V+). For example driving the device with
2.85V logic (0V to 2.85V) while operating with a 4.2V supply
VIN = 2.85V).
Frequency Performance
In 50
Ω systems, the ISL54047 has a -3dB bandwidth of
27MHz (see Figure 21). The frequency response is very
consistent over a wide V+ range, and for varying analog
signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed
through from a switch’s input to its output. Off Isolation is the
resistance to this feed through, while Crosstalk indicates the
amount of feed through from one switch to another. Figure
22 details the high Off Isolation and Crosstalk rejection
provided by this part. At 100kHz, Off Isolation is about 102dB
in 50
Ω systems, 118dB into 8Ω, and 124dB into 4Ω,
decreasing approximately 20dB per decade as frequency
increases. Higher load impedances decrease Off Isolation
and Crosstalk rejection due to the voltage divider action of
the switch OFF impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
FIGURE 8. OVERVOLTAGE PROTECTION
GND
VCOM
VNX
V+
INX
OPTIONAL
PROTECTION
RESISTOR
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
SCHOTTKY
DIODE
ISL54047
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISL54048 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch |
| ISL54048_0706 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch |
| ISL54048IRUZ-T | 功能描述:IC MUX/DEMUX DUAL 4X1 10UTQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關，多路復用器，多路分解器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:36 系列:- 功能:多路復用器 電路:2 x 4:1 導通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:20-SOIC W 包裝:管件 |
| ISL54049 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch |
| ISL54049IRUZ-T | 功能描述:IC SWITCH DUAL SPST 10UTQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關，多路復用器，多路分解器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:36 系列:- 功能:多路復用器 電路:2 x 4:1 導通狀態(tài)電阻:75 歐姆 電壓電源:單/雙電源 電壓 - 電源，單路/雙路(±):2 V ~ 12 V，±2 V ~ 6 V 電流 - 電源:- 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:20-SOIC W 包裝:管件 |
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