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參數(shù)資料
| 型號： | ISL5314INZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZER DIGITAL 48-MQFP |
| 標準包裝： | 250 |
| 分辨率（位）： | 14 b |
| 主 fclk： | 125MHz |
| 調(diào)節(jié)字寬（位）： | 48 b |
| 電源電壓： | 3 V ~ 5.5 V，4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
12
FN4901.3
January 19, 2010
Definition of Specifications
Differential Non-Linearity (DNL) is the measure of the step
size output deviation from code to code. Ideally the step size
should be one LSB. A DNL specification of one LSB or less
guarantees monotonicity.
Integral Non-Linearity (INL) is the measure of the worst
case point that deviates from a best fit straight line of data
values along the transfer curve.
Full Scale Gain Drift is measured by setting the DAC inputs
to be all logic high (all 1’s) and measuring the output voltage
through a known resistance as the temperature is varied
from TMIN to TMAX. It is defined as the maximum deviation
from the value measured at room temperature to the value
measured at either TMIN or TMAX. The units are ppm of FSR
(full scale range) per °C.
Full Scale Gain Error is the error from an ideal ratio of 32
between the DAC output current and the full scale adjust
current (through RSET).
Internal Reference Voltage Drift is defined as the
maximum deviation from the value measured at room
temperature to the value measured at either TMIN or TMAX.
The units are ppm per °C.
Offset Drift is measured by setting the DAC inputs to all
logic low (all 0’s) and measuring the output voltage through a
known resistance as the temperature is varied from TMIN to
TMAX. It is defined as the maximum deviation from the value
measured at room temperature to the value measured at
either TMIN or TMAX. The units are ppm of FSR (Full Scale
Range) per °C.
Offset Error is measured by setting the DAC inputs to all
logic low (all 0’s) and measuring the output voltage through a
known resistance. Offset error is defined as the maximum
deviation of the output current from a value of 0mA.
Output Settling Time is the time required for the output
voltage to settle to within a specified error band measured
from the beginning of the output transition. The
measurement is done by switching quarter scale.
Termination impedance was 25
Ω due to the parallel
resistance of the 50
Ω loading on the output and the
oscilloscope’s 50
Ω input. This also aids the ability to resolve
the specified error band without overdriving the oscilloscope.
Output Voltage Compliance Range is the voltage limit
imposed on the output. The output impedance should be
chosen such that the voltage developed at either IOUTA or
IOUTB does not violate the compliance range.
Power Supply Rejection is measured using a single power
supply. The nominal supply is varied ±10% and the change
in the DAC full scale output current is noted.
Reference Input Multiplying Bandwidth is defined as the
3dB bandwidth of the voltage reference input. It is measured
by using a sinusoidal waveform as the external reference
with the digital inputs to the DAC set to all 1’s. The frequency
is increased until the amplitude of the output waveform is
0.707 (-3dB) of its original value.
Spurious Free Dynamic Range (SFDR) is the amplitude
difference from the fundamental signal to the largest
harmonically or non-harmonically related spur within the
specified frequency window.
ISL5314
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