tPLH, t
參數(shù)資料
型號： ISL4491EIBZ-T
廠商： Intersil
文件頁數(shù)： 8/12頁
文件大小： 0K
描述： IC TXRX RS485/422 LP HS 14-SOIC
標準包裝： 2,500
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 1/1
規(guī)程： RS422，RS485
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 14-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 14-SOICN
包裝： 帶卷 (TR)
5
FN6074.3
SWITCHING CHARACTERISTICS (ISL4489E)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
250
400
2000
ns
Driver Output Skew
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
160
800
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
250
600
2000
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
250
1000
2000
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
250
860
2000
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
300
660
3000
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
300
640
3000
ns
Receiver Input to Output Delay
tPLH, tPHL Figure 4
Full
250
500
2000
ns
Receiver Skew | tPLH - tPHL |tSKD
Figure 4
25
-
60
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5)
Full
-
10
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5)
Full
-
10
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5)
Full
-
10
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5)
Full
-
10
50
ns
Maximum Data Rate
fMAX
Full
250
-
kbps
SWITCHING CHARACTERISTICS (ISL4491E)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
13
24
40
ns
Driver Output Skew
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
3
10
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
5
12
20
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
14
70
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
14
70
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
44
70
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
21
70
ns
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
30
90
150
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 4)
25
-
5
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5)
Full
-
9
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5)
Full
-
9
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5)
Full
-
9
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5)
Full
-
9
50
ns
Maximum Data Rate
fMAX
Full
15
-
Mbps
ESD PERFORMANCE
RS-485 Pins (A, B, Y, Z)
Human Body Model
25
-
±15
-
kV
All Other Pins
25
-
>
±7-
kV
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. Devices meeting these limits are denoted as “1/8 unit load (1/8 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus,
so there can be 256 1/8 UL devices on a bus.
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = 25°C,
Note 2 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
ISL4489E, ISL4491E
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