FN7529.1 March 14, 2013 functions (EN12 and EN34) that enable (when high) or disable (when low) the corresponding pairs of Rx. All four of thes" />
參數(shù)資料
型號: ISL32273EFVZ
廠商: Intersil
文件頁數(shù): 4/22頁
文件大?。?/td> 0K
描述: IC RCVR RS485/422 QD ESD 16TSSOP
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 960
類型: 接收器
驅(qū)動器/接收器數(shù): 0/4
規(guī)程: RS422,RS485
電源電壓: 3 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
12
FN7529.1
March 14, 2013
functions (EN12 and EN34) that enable (when high) or
disable (when low) the corresponding pairs of Rx. All four
of these enable pins have internal pull-up resistors to
VCC, but unused enable pins that need to be high (e.g.,
EN when using the EN input for enable control, or EN12
and EN34 when using always enabled receivers) should
always be connected externally to VCC. If VCC transients
might exceed 7V, then inserting a series resistor between
the input(s) and VCC limits the current that flows if the
input’s ESD protection starts conducting.
The ISL32177E and ISL32277E have the most flexible
enable scheme. Their six enable pins allow for group,
paired, or individual channel enable control. Figure 3
details the ISL32X77E’s internal enable logic. To utilize a
group enable function, connect all the ENX pins high, and
handle the EN and EN pins as described in the previous
paragraph. For paired enables, connect EN and EN high
(for the lowest current in SHDN mode, if SHDN is used)
and tie EN1 and EN2 together, and EN3 and EN4
together. For individual channel enables, again connect
EN and EN high, and drive the appropriate ENX (active
high) for the particular channel. All six enable pins
incorporate pull-up resistors to VCC, but unused enable
pins of any type should be externally connected high,
rather than being left floating. Connecting to VCC is the
best choice, but VL may be utilized as long as SHDN
power isn’t a primary concern (for each VL connected
input, ICC increases by (VCC - VL)/600kΩ). If VCC or VL
transients might exceed 7V, then inserting a series
resistor between the input(s) and the supply limits the
current that will flow if the input’s ESD protection starts
conducting.
Wide Supply Range
The ISL32X7XE design operates with a wide range of
supply voltages from 3.0V to 5.5V, and the receivers
meet the RS-485 specs for that full supply voltage range.
5.5V TOLERANT LOGIC PINS
Logic input pins (enables, SHDNEN) contain no ESD nor
parasitic diodes to VCC (nor to VL), so they withstand
input voltages exceeding 5.5V regardless of the VCC and
VL voltages (see Figure 6).
Logic Supply (VL Pin, ISL32177E and
ISL32277E)
Note: If powered from separate supplies, power up VCC
before powering up the VL supply.
The ISL32177E and ISL32277E include a VL pin that
powers the logic inputs (enables, SHDNEN) and the RO
outputs. These pins interface with “l(fā)ogic” devices such as
UARTs, ASICs, and controllers, and today most of these
devices use power supplies significantly lower than 3.3V.
Thus, a 5V or 3.3V RO output level from an ISL32X77E
IC might seriously overdrive and damage the logic device
input (Figure 4). Similarly, the logic device’s low VOH
might not exceed the VIH of the ISL32X77E’s 3.3V or 5V
powered enable input. Connecting the ISL32X77E’s VL
pin to the power supply of the logic device - as shown in
Figure 4 - limits the ISL32X77E’s VOH to VL, and reduces
its logic input switching points to values compatible with
the logic device’s output levels. Tailoring the logic pin
input switching points and RO output levels to the supply
voltage of the UART, ASIC, or controller eliminates the
need for a level shifter/translator between the two ICs.
VL can be anywhere from VCC down to 1.4V, but the data
rate drops off dramatically below VL = 1.6V. Table 2
indicates typical VIH and VIL values (applicable to both
speed grades) for various VL settings, and also lists the
ISL32177E’s typical data rate versus VL. The ISL32277E
typically runs at 20Mbps for VL ≥ 1.6V, and drops to
10Mbps to 15Mbps at VL=1.4V. Prop delays, skews, and
transition times increase at lower VL, as shown in Figures
17 through 29.
FIGURE 3. ISL32X77E ENABLE LOGIC
1 OF 4 CHANNELS
VCC
ENX
EN
CHX EN
FIGURE 4. USING VL PIN TO ADJUST LOGIC LEVELS
GND
RXD
RXEN
VCC = +2V
UART/PROCESSOR
GND
RO
EN
VCC = +3.3V
ISL32X7XE
VOH ≤ 2V
VOH = 3.3V
VIH ≥ 2V
ESD
DIODE
GND
RXD
RXEN
VCC = +2V
UART/PROCESSOR
GND
RO
EN
VCC = +3.3V TO 5V
ISL32X77E
VOH ≤ 2V
VOH = 2V
VIH = 0.9V
ESD
DIODE
VL
ISL32173E, ISL32175E, ISL32177E, ISL32273E, ISL32275E, ISL32277E
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