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參數(shù)資料
| 型號： | ISL3036EIRZ-TK |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LEVEL TRANSLATOR 4CH 14-TQFN |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 邏輯功能： | 變換器，雙向 |
| 位數(shù)： | 4 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 數(shù)據(jù)速率： | 100Mbps |
| 通道數(shù)： | 4 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 電源電壓： | 2.2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-VFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 14-QFN |
| 包裝： | 帶卷 (TR) |
6
FN6492.0
March 31, 2009
I/OVL, CLK_RET Fall Time
tFVL
RS = 150Ω, CI/OVL = 15pF,
CCLK_RET = 15pF
VL ≥ 1.35V
Full
-
4
ns
VL ≥ 1.62V
Full
-
3.5
ns
I/OVCC, CLK_VCC Propagation
Delay (Driving I/OVL, CLK_VL)
tPDVCC
RS = 150Ω, CI/OVCC = 10pF,
CCLK_VCC = 10pF, push-pull
drivers
VL ≥ 1.35V
Full
-
7.5
ns
VL ≥ 1.62V
Full
-
6.5
ns
tPDVCC Channel-to-Channel
Skew (Note 9)
tSKEWC
VL ≥ 1.35V
Full
-
1.3
ns
VL ≥ 1.62V
Full
-
1
ns
I/OVL, CLK_RET Propagation
Delay (Driving I/OVCC,
CLK_VCC)
tPDVL
RS = 150Ω, CI/OVL = 15pF, CCLK_RET =15pF,
push-pull drivers
Full
-
6.5
ns
tPDVL Channel-to-Channel Skew
(Note 9)
tSKEWL
VL ≥ 1.35V
Full
-
1.3
ns
VL ≥ 1.62V
Full
-
0.8
ns
Delay from EN High to I/OVCC
Active
tEN-VCC RLOAD = 1MΩ, CI/OVCC = 10pF (ISL3034E and
ISL3036E)
25
-
1.5
-
s
Delay from EN High to I/OVL
Active
tEN-VL
RLOAD = 1MΩ, CI/OVL = 15pF (ISL3034E and
ISL3036E)
25
-
1.5
-
s
Maximum Data Rate
D.R.1.35 Push-pull operation,
RSOURCE = 150Ω,
CI/OVCC = 10pF, CI/OVL = 15pF,
CCLK_VCC = 10pF,
CCLK_RET = 15pF
VL ≥ 1.35V
Full
85
-
Mbps
D.R.1.6
VL ≥ 1.62V
Full
100
-
Mbps
NOTES:
6. VL must be less than or equal to VCC - 0.2V during normal operation. However, VL can be greater than VCC during start-up and shutdown
conditions and the part will not latch-up nor be damaged.
7. Input thresholds are referenced to the boost circuit.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. Delta between all I/OVL channel prop delays, or delta between all I/OVCC channel prop delays, all channels tested at the same test conditions.
Test Circuits and Waveforms
FIGURE 1A. TEST CIRCUIT
FIGURE 1B. MEASUREMENT POINTS
FIGURE 1. I/OVCC OUTPUT PROPAGATION DELAY AND TRANSITION TIMES (PUSH - PULL)
Electrical Specifications
VCC = +2.2V to +3.6V, VL = +1.35V to +3.2V, EN = VL, unless otherwise noted. Typical values are at
VCC =+3.3V, VL = +1.8V and TA = +25°C. (Note 6). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 8)
TYP
MAX
(Note 8) UNITS
SIGNAL
GENERATOR
VL
EN
VCC
150
Ω
I/OVL
I/OVCC
CL
VL
0V
50%
tRVCC
90%
tFVCC
10%
I/OVL
tPDVCC = tPLH or tPHL
50%
tPLH
tPHL
VOH
VOL
I/OVCC
ISL3034E, ISL3035E, ISL3036E
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