參數(shù)資料
型號: ISL28266FUZ-T7
廠商: Intersil
文件頁數(shù): 2/11頁
文件大?。?/td> 0K
描述: IC OPAMP RRIO CURRENT 39UA 8MSOP
標(biāo)準(zhǔn)包裝: 1,500
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.05 V/µs
增益帶寬積: 250kHz
電流 - 輸入偏壓: 1.14nA
電壓 - 輸入偏移: 7µV
電流 - 電源: 78µA
電流 - 輸出 / 通道: 31mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 5 V,±1.2 V ~ 2.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
10
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN6155.5
January 16, 2014
Applications Information
Introduction
The ISL28166 is a BiMOS rail-to-rail input, output (RRIO)
operational amplifier with an enable feature. The device is
designed to operate from single supply (2.4V to 5.0V) or dual
supplies (±1.2V to ±2.5V) while drawing only 39A of supply
current. This combination of low power and precision
performance makes this device suitable for a variety of low
power applications including battery powered systems.
Rail-to-Rail Input/Output
This device feature bi-polar input which has an input
common mode range that extends to the rails and CMOS
outputs that can typically swing to within about 4mV of the
supply rails with a 100k
Ω load. The NMOS sinks current to
swing the output in the negative direction. The PMOS sources
current to swing the output in the positive direction.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure
the input currents never exceed 5mA (Figure 33).
Enable/Disable Feature
The ISL28166 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically
10A. By disabling the part, multiple ISL28166 parts can be
connected together as a MUX. In this configuration, the
outputs are tied together in parallel and a channel can be
selected by the EN pin. The EN pin also has an internal
pull-down. If left open, the EN pin will pull to the negative rail
and the device will be enabled by default.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Current Limiting
This device has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
where:
PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated using
Equation 2:
where:
TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
PDMAX = Maximum power dissipation of 1 amplifier
VS = Supply voltage
IMAX = Maximum supply current of 1 amplifier
VOUTMAX = Maximum output voltage swing of the
application
RL = Load resistance
FIGURE 33. INPUT CURRENT LIMITING
-
+
RIN
RL
VIN
VOUT
T
JMAX
T
MAX
θ
JAxPDMAXTOTAL
()
+
=
(EQ. 1)
PD
MAX
2*V
S
I
SMAX
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
×
+
×
=
(EQ. 2)
ISL28166
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