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參數(shù)資料
| 型號(hào)： | ISL28233IUZ-T7 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 5/19頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP R-R 400KHZ LN 8MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Patient Monitoring and Diagnostic Equipment Solutions |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 放大器類型： | 斷路器（零漂移） |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 0.2 V/µs |
| 增益帶寬積： | 400kHz |
| 電流 - 輸入偏壓： | 30pA |
| 電壓 - 輸入偏移： | 2µV |
| 電流 - 電源： | 18µA |
| 電流 - 輸出 / 通道： | 19mA |
| 電壓 - 電源，單路/雙路(±)： | 1.65 V ~ 5.5 V，±0.825 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
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13
FN6942.2
November 17, 2011
Applications Information
Functional Description
The ISL28233IUZ uses a proprietary chopper-stabilized
technique (see Figure 41) that combines a 400kHz main
amplifier with a very high open loop gain (174dB)
chopper amplifier to achieve very low offset voltage and
drift (2V, 0.02V/°C typical) while consuming only 18A
of supply current per channel.
This multi-path amplifier architecture contains a time
continuous main amplifier whose input DC offset is
corrected by a parallel-connected, high gain chopper
stabilized DC correction amplifier operating at 100kHz.
From DC to ~5kHz, both amplifiers are active with DC
offset correction and most of the low frequency gain is
provided by the chopper amplifier. A 5kHz crossover filter
cuts off the low frequency amplifier path leaving the
main amplifier active out to the 400kHz gain-bandwidth
product of the device.
The key benefits of this architecture for precision
applications are very high open loop gain, very low DC
offset, and low 1/f noise. The noise is virtually flat across
the frequency range from a few millihertz out to 100kHz,
except for the narrow noise peak at the amplifier
crossover frequency (5kHz).
Rail-to-rail Input and Output (RRIO)
The RRIO CMOS amplifier uses parallel input PMOS and
NMOS that enable the inputs to swing 100mV beyond
either supply rail. The inverting and non-inverting inputs
do not have back-to-back input clamp diodes and are
capable of maintaining high input impedance at high
differential input voltages. This is effective in eliminating
output distortion caused by high slew-rate input signals.
The output stage uses common source connected PMOS
and NMOS devices to achieve rail-to-rail output drive
capability with 17mA current limit and the capability to
swing to within 20mV of either rail while driving a 10kΩ
load.
IN+ and IN- Protection
All input terminals have internal ESD protection diodes
to both positive and negative supply rails, limiting the
input voltage to within one diode beyond the supply
rails. For applications where either input is expected to
exceed the rails by 0.5V, an external series resistor
must be used to ensure the input currents never exceed
20mA (see Figure 42).
Layout Guidelines for High Impedance
Inputs
To achieve the maximum performance of the high input
impedance and low offset voltage of the ISL28233IUZ,
care should be taken in the circuit board layout. The PC
board surface must remain clean and free of moisture to
avoid leakage currents between adjacent traces.
Surface coating of the circuit board will reduce surface
moisture and provide a humidity barrier, reducing
parasitic resistance on the board. The use of guard rings
around the amplifier inputs will further reduce leakage
currents. Figure 43 shows how the guard ring should be
configured. The guard ring does not need to be a
specific width, but it should form a continuous loop
around both inputs. By setting the guard ring voltage
equal to the voltage at the non-inverting input, parasitic
capacitance is minimized as well.
High Gain, Precision DC-Coupled Amplifier
The circuit in Figure 44 implements a single-stage
DC-coupled amplifier with an input DC sensitivity of
under 100nV that is only possible using a low VOS
amplifier with high open loop gain. High gain DC
FIGURE 41. ISL28233IUZ FUNCTIONAL BLOCK DIAGRAM
VOUT
IN-
IN+
5kHz CROSSOVER
FILTER
CHOPPER STABILIZED DC OFFSET CORRECTION
MAIN AMPLIFIER
FIGURE 42. INPUT CURRENT LIMITING
-
+
RIN
RL
VIN
VOUT
ISL28433
IN
V+
FIGURE 43. USE OF GUARD RINGS TO REDUCE
HIGH IMPEDANCE INPUT
GUARD RING
PC TRACE
+
-
ISL28233I
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ISL28233IUZ-T7A | 制造商:Intersil 功能描述:ISL28233IUZ DL MICRO PWR RRIO ZERO-DRIFT |
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| ISL28236 WAF | 制造商:Intersil Corporation 功能描述: |
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