參數(shù)資料
型號： ISL28194FRUZ-T7
廠商： Intersil
文件頁數(shù)： 2/12頁
文件大?。?/td> 0K
描述： IC OPAMP RRIO SGL 300NA 6-TDFN
標(biāo)準(zhǔn)包裝： 1,000
放大器類型： 通用
電路數(shù)： 1
輸出類型： 滿擺幅
轉(zhuǎn)換速率： 0.0012 V/µs
增益帶寬積： 3.5kHz
電流 - 輸入偏壓： 15pA
電壓 - 輸入偏移： 100µV
電流 - 電源： 0.33µA
電流 - 輸出 / 通道： 12mA
電壓 - 電源，單路/雙路(±)： 1.8 V ~ 5.5 V，±0.9 V ~ 2.75 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 6-UFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 6-UTDFN（1.6x1.6）
包裝： 帶卷 (TR)
10
FN6236.5
January 14, 2014
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
In the disabled state (output in a high impedance state), the
supply current is reduced to typical of only 2nA. By disabling
the devices, multiple parts can be connected together as a
MUX. In this configuration, the outputs are tied together in
parallel and a channel can be selected by the EN pin. The
EN pin should never be left floating. The EN pin should be
connected directly to the V+ supply when not in use.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance, care should be taken in the circuit board layout.
The PC board surface must remain clean and free of moisture
to avoid leakage currents between adjacent traces. Surface
coating of the circuit board will reduce surface moisture and
provide a humidity barrier, reducing parasitic resistance on the
board. When input leakage current is a concern, the use of
guard rings around the amplifier inputs will further reduce
leakage currents. Figure 30 shows a guard ring example for a
unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to be
a specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
components can be mounted to the PC board using Teflon
standoff insulators.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 1:
where:
PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated as shown in
Equation 2:
where:
TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
PDMAX = Maximum power dissipation of 1 amplifier
VS = Supply voltage (Magnitude of V+ and V-)
IMAX = Maximum supply current of 1 amplifier
VOUTMAX = Maximum output voltage swing of the
application
RL = Load resistance
IN
V+
FIGURE 30. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
HIGH IMPEDANCE INPUT
T
JMAX
T
MAX
θ
JAxPDMAXTOTAL
()
+
=
(EQ. 1)
PD
MAX
2*V
S
I
SMAX
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
×
+
×
=
(EQ. 2)
ISL28194
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