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參數(shù)資料
| 型號： | ISL28114SOT23EVAL1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION BOARD FOR ISL28114 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 每 IC 通道數(shù)： | 1 - 單 |
| 放大器類型： | 通用 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 2.5 V/µs |
| 電流 - 輸出 / 通道： | 31mA |
| 工作溫度： | -40°C ~ 125°C |
| 電流供應(yīng)（主 IC）： | 300µA |
| 電壓 - 電源，單路/雙路(±)： | 2.4 V ~ 5.5 V，±1.2 V ~ 2.75 V |
| 板類型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL28114 |
ISL28114, ISL28214, ISL28414
15
FN6800.8
November 15, 2012
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to Web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
October 26, 2012
FN6800.8
Added SOT23-8 package on page 1 to description and features.
Added Lead Finish Note to Ordering information for 8 LD SOT-23 parts.
Thermal Information on page 4 - Added 8 LD SOT-23 package with Tja and Tjc
Added P8.064 POD on page 23.
April 13, 2012
FN6800.7
Changed the low supply current in “Features” and description on page 1 from 360A to 390A.
Removed ISL28114FEV1Z-T7 Coming Soon parts from “Ordering Information” on page 2.
Removed applicable pinout from page 2.
January 3, 2012
FN6800.6
May 18, 2011
FN6800.5
- On page 3, Pin Descriptions: Circuit 3 diagram, removed anti-parallel diodes from the IN+ to IN-
terminals.
- On page 4, Absolute Maximum Ratings: changed Differential Input Voltage from "0.5V" to "V- -
0.5V to V+ + 0.5V"
- On page 4, updated CMRR and PSRR parameters in Electrical Specifications table with test
condition specifying -40°C to 125°C typical parameter.
Specifications table, from "Parameters with MIN and/or MAX limits are 100% tested at +25°C,
unless otherwise specified. Temperature limits established by characterization and are not
production tested." to new standard "Compliance to datasheet limits is assured by one or more
methods: production test, characterization and/or design."
- On page 9, under “Input ESD Diode Protection,” removed “They also contain back to-back
diodes across the input terminals.” Removed “Although the amplifier is fully protected, high
input slew rates that exceed the amplifier slew rate (±2.5V/s) may cause output distortion.”
- On page 9, Figure 19: updated circuit schematic by removing back-to-back input protection
diodes.
September 23, 2010
FN6800.4
Added new SC70 pinout package extension as follows:
Added to Related Literature on page 1 “See AN1547
for “ISL28414TSSOPEVAL1Z Evaluation
Board User’s Guide”.
Added to ordering information ISL28114FEV1Z-T7 and ISL28114FEV1Z-T7A and Evaluation
boards.
Added to Pin Configurations new pinout for ISL28114FEV1Z.
Added in Pin Descriptions ISL28114FEV1Z SC70 pin description column.
July 28, 2010
θJC, the “case temp” location is the center of the
exposed metal pad on the package underside.” to
“For
θJC, the “case temp” location is taken at the package top center.”
May 13, 2010
Changed package outline drawing from MDP0038 to P5.064A on page 2 and page 18.
MDP0038 package contained 2 packages for both the 5 and 6 Ld SOT-23. MDP0038 was
obsoleted and the packages were separated and made into 2 separate package outline
drawings; P5.064A and P6.064A. Changes to the 5 Ld SOT-23 were to move dimensions from
table onto drawing, add land pattern and add JEDEC reference number.
December 16, 2009
FN6800.3
Removed “Coming Soon” from MSOP package options in the “Ordering Information” on page 2.
Updated the Theta JA for the MSOP package option from 170°C/W to 180°C/W on page 4.
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