ISL28107, ISL28207, ISL28407
26
FN6631.7
February 25, 2013
August 26, 2011
FN6631.4 On
page 3, Pin Configurations, added ISL28207 MSOP pin diagram.
On
page 4, Pin Descriptions, added ISL28207 MSOP to pin descriptions.
On
page 5, Ordering Information, added ISL28207FUZ part and information. Updated ISL28107FBZ Pkg Dwg # from
M8.118 to M8.118B. For ISL28107FRTZ and ISL28207FRTZ, updated Pkg Dwg # from L8.3x3A to L8.3x3K. For
"Coming Soon" parts: ISL28407FBZ: changed Pkg Dwg # from M14.15 to MDP0027; ISL28407FVZ: changed Pkg
Dwg # from M14.173 to MDP0044; ISL28407FRZ: changed Pkg Dwg # from 16.4x4 to L16.4x4E. ISL28207FRTZ:
changed Part Marking from 207Z to 8207. For "Coming Soon" parts: ISL28407FBZ: changed Part Marking from
28407 to 28407 FBZ. ISL28407FVZ: changed Part Marking from 28407 to 28407 FVZ. ISL28407FRZ: changed Part
Marking from 28407 to 407FRZ. Added "Coming Soon" ISL28407SOICEVAL1Z Evaluation Board.
On
page 6, Thermal Information, added ISL28207 8Ld MSOP, and ISL28407 14 Ld SOIC and 16 Ld QFN thermal
information.
On page 6 and page 8, Electrical Specifications: for VOS spec for ISL28207 MSOP package, added -110V MIN, +110 V MAX, and -200V MIN, +200V MAX. For TCVOS spec for ISL28207 MSOP package, added -0.9V/°C MIN,
+0.9V/°C MAX.
On page 8 and page 8, Electrical Specifications: for TCIB spec for ISL28207 MSOP package, added -1.5pA/°C MIN, +1.5pA/°C MAX. For TCIOS spec for ISL28207 MSOP package, added -1.5pA/°C MIN, +1.5pA/°C MAX.
Updated to current Intersil datasheet template.
September 7, 2010 FN6631.3 1. General changes:
a. Added in ISL28407 Quad devices for SOIC, TSSOP and QFN packages.
b. Added in TDFN packages for single ISL28107 and dual ISL28207 devices.
c. Added in new VOS and TCVOS limits for TDFN packages
2. Specific changes:
a. On
page 1 – Added in ISL28407 to title and front page info. Corrected Input Bias Current in Features from 60pA to
15pA (in order to match Spec Table)
b. On page 3 - Added in ISL28107FRTZ, ISL28207FRTZ, ISL28407FBZ, ISL28407FVZ, and ISL28407FRZ packages to
Ordering information. Added in –T7, T-13 & -T7A tape and reel extensions where applicable.
c. On page 3 -Corrected part marking for ISL28207FRTZ parts from 207Z to 8207
d. On
page 3 – Added in TDFN, 14 Ld SOIC, 14 Ld TSSOP and 16 Ld QFN to pin configurations.
g. On
page 6 and page 7 Electrical Specifications Tables – Added two new line items for VOS spec. TDFN package
ISL28107 limits ±100uV 25C and ±190uV full temp. TDFN package ISL28207 limits ±100uV 25C and ±175uV full
temp.
h. On
page 6 and page 7 Electrical Specifications Table – Added two new line items for TCVOS spec. TDFN package
ISL28107 limits ±0.9uV/C full temp. TDFN package ISL28207 limits ±0.75uV/C.
i. On page 30 to page 34 - Added in POD for L8.3x3A, M14.15, M14.173, and L16.4x4
March 9, 2010
FN6631.2 1. Added MSOP package to the ordering information and added applicable POD M8.118 to end of datasheet
2. Separated each part number with it's own specific -T7 and -T13 suffix. Removed “Add
“-T7” or “-T13” suffix for Tape and Reel.” from Note 1.
3. Added MSOP to the Pin Configuration and Pin Descriptions
4. Updated ±15 and ±5V Electrical Specification table with the following edits:
A) Separated VOS specs for SOIC and MSOP packages. Added new VOS specs for MSOP Grade package.
B) Separated TCVOS specs for SOIC and MSOP packages. Added new TCVOS specs for MSOP package.
5. Added Theta JA and JC for the 8 Ld MSOP package. Added Theta JC values for both SOIC package options. Changed
Theta JA for 8 Ld SOIC (ISL28207) from 115 to 105.
February 22, 2010
1. Added “Related Literature*(see page 26)” on page 1.
2. Added Evaluation Boards to “Ordering Information” on page 3.
3. “Electrical Specifications” Tables, page 6 to page 10. Unbolded MIN/MAX specs with “TA = -40°C to +85°C” conditions (since only MIN/MAX specs with “TA = -40°C to +125°C” conditions should be bolded, per note in common
conditions)
4. Corrected Note reference in ISC parameter on page 7 and page 10 from Note 3 to Note 9. November 10, 2009 FN6631.1 1. Updated VOS, IB, and IOS electrical specifications.
2. Added Typical performance curves, Figures
3 through
32.3. Output Short Circuit Current test condition has been clarified with Note
9.4. Updated POD.
5. Added Spice Model, associated text and Figures
58 through
68.6. Deleted old Figures 6, 7, 8, 10, 11 and 12.
7. Added Licence Statement on page 16 and referenced in spice model.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision. (Continued)
DATE
REVISION
CHANGE