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參數(shù)資料
| 型號： | ISL28005FH50Z-T7A |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/15頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CURRENT SENSE SOT23-5 |
| 應(yīng)用說明： | ISL28005/06 Application Note |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Test and Measurement Equipment Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 電流檢測 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 0.67 V/µs |
| -3db帶寬： | 160kHz |
| 電流 - 輸入偏壓： | 4.7µA |
| 電壓 - 輸入偏移： | 1200µV |
| 電流 - 電源： | 50µA |
| 電流 - 輸出 / 通道： | 8.7mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 28 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74A，SOT-753 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-5 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ISL28005FH50Z-T7ADKR |
ISL28005
10
FN6973.5
October 24, 2013
Applications Information
Functional Description
The ISL28005-20, ISL28005-50 and ISL28005-100 are single
supply, uni-directional current sense amplifiers with fixed gains
of 20V/V, 50V/V and 100V/V respectively.
The ISL28005 is a 2-stage amplifier. Figure 26 shows the active
circuitry for high-side current sense applications where the sense
voltage is between 1.35V to 28V. Figure 27 shows the active
circuitry for ground sense applications where the sense voltage is
between 0V to 1.35V.
The first stage is a bi-level trans-conductance amp and level
translator. The gm stage converts the low voltage drop (VSENSE)
sensed across an external milli-ohm sense resistor, to a current
(@ gm = 21.3A/V). The trans-conductance amplifier forces a
current through R1 resulting to a voltage drop across R1 that is
equal to the sense voltage (VSENSE). The current through R1 is
mirrored across R5 creating a ground-referenced voltage at the
input of the second amplifier equal to VSENSE.
The second stage is responsible for the overall gain and
frequency response performance of the device. The fixed gains
(20, 50, 100) are set with internal resistors Rf and Rg. The only
external component needed is a current sense resistor (typically
0.001
Ω to 0.01Ω, 1W to 2W).
The transfer function is given in Equation 1.
Where ISRS is the product of the load current and the sense
resistor and is equal to VSENSE.
When the sensed input voltage is >1.35V, the gmHI amplifier
path is selected and the input gm stage derives its ~2.86A
supply current from the input source through the RS+ terminal.
When the sense voltage at RS+ drops below the 1.35V threshold,
the gmLO amplifier is enabled for Low Side current sensing. The
gmLO input bias current reverses, flowing out of the RS- pin.
Since the gmLO amplifier is sensing voltage around ground, it
cannot source current to R5. A current mirror referenced off Vcc
supplies the current to the second stage for generating a ground
input bias currents for High and Low side current sensing.
FIGURE 23. SLEW RATE, ts, SATURATION RECOVERY TIME
FIGURE 24. GAIN vs FREQUENCY
FIGURE 25. SLEW RATE
Test Circuits and Waveforms (Continued)
RS+
VCC
RS-
VOUT
OUT
RL
GND
VRS-
VRS+
1M
Ω
PULSE
GENERATOR
RS+
VCC
RS-
VOUT
OUT
RL
GND
VSENSE
VRS+
1M
Ω
SIGNAL
GENERATOR
RS+
VCC
RS-
VOUT
OUT
RL
GND
VRS+
1M
Ω
PULSE
GENERATOR
V
OUT
GAIN
I
SRS
V
OS
+
()
×
=
(EQ. 1)
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