6 FN7585.0 February 23, 2011 Application Information LCD panels have a VCOM
參數(shù)資料
型號: ISL24211IRTZ
廠商: Intersil
文件頁數(shù): 9/12頁
文件大小: 0K
描述: IC VCOM CALIBRATOR I2C 10TDFN
標(biāo)準(zhǔn)包裝: 100
類型: 校準(zhǔn)器
應(yīng)用: LCD 驅(qū)動器,基準(zhǔn)電壓發(fā)生器
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-TDFN(3x3)
包裝: 管件
ISL24211
6
FN7585.0
February 23, 2011
Application Information
LCD panels have a VCOM (common voltage) that must be precisely
set to minimize flicker. Figure 3 shows a typical VCOM adjustment
circuit using a mechanical potentiometer, and the equivalent
circuit replacement using the ISL24211. Having a digital I2C
interface enables automatic, digital flicker minimization during
production test and alignment. After programming, the I2C
interface has no further use therefore, the ISL24211 automatically
powers up with the correct VCOM voltage programmed previously.
The ISL24211 uses a digitally controllable potentiometer (DCP),
with 256 steps of resolution (see Figure 4) to change the current
drawn at the DVR_OUT pin, which then changes the voltage
created by the R1 to R2 resistor divider (see Figure 5). The
DVR_OUT voltage is then buffered by A2 to generate a buffered
output voltage at the VCOM_OUT pin, capable of directly driving the
VCOM input of an LCD panel. The amount of current sunk is
controlled by the setting of the DCP, which is recalled at power-up
from the ISL24211’s internal EEPROM. The EEPROM is typically
programmed during panel manufacture. As noted in the
Electrical Specifications on page 4, the ISL24211 requires a
minimum AVDD voltage of 10.8V for EEPROM programming, but
will work in normal operation (with no EEPROM programming)
down to 4.5V.
DCP (Digitally Controllable Potentiometer)
The DCP controls the voltage that ultimately controls the SET
current. Figure 4 shows the relationship between the register
value and the DCP’s tap position. Note that a register value of 0
selects the first step of the resistor string. The output voltage of
the DCP is given in Equation 1:
Output Current Sink
Figure 5 shows the schematic of the DVR_OUT current sink. The
combination of amplifier A1, transistor Q1, and resistor RSET
forms a voltage-controlled current source, with the voltage
determined by the DCP setting.
The external RSET resistor sets the full-scale (maximum) sink current
that can be pulled from the DVR_OUT node. The relationship
between IDVR_OUT and Register Value is shown in Equation 2.
FIGURE 3. MECHANICAL ADJUSTMENT REPLACEMENT
DVR_OUT
SET
ISL24211
R1
R2
AVDD
VCOM
IOUT
VDD
RSET
RA
RC
AVDD
VCOM
RB
R1 = RA
R2 = RB+RC
RSET = RARB + RARC
20RB
INN
VCOM_OUT
VDCP
RegisterValue 1
+
256
---------------------------------------------------
AVDD
20
--------------
=
(EQ. 1)
FIGURE 4. SIMPLIFIED SCHEMATIC OF DCP
AVDD
19R
R
0
1
2
255
254
253
252
251
REGISTER
VALUE
AVDD
20
VDCP
FIGURE 5. CURRENT SINK CIRCUIT
AVDD
RSET
VDCP
SET
DVR_OUT
AVDD
IOUT
R1
R2
VSAT
VSET = VDCP = IOUT * RSET
Q1
A1
VOUT
VCOM_OUT
INN
GND
A2
IDVR_OUT
IDVROUT
VDCP
RSET
-------------
RegisterValue 1
+
256
---------------------------------------------------
AVDD
20
--------------
1
RSET
-------------
==
(EQ. 2)
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