ISL23348
17
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FN7903.1
August 24, 2011
Applications Information
VLOGIC Requirements
VLOGIC should be powered continuously during normal operation.
In a case where turning VLOGIC OFF is necessary, it is
recommended to ground the VLOGIC pin of the ISL23348.
Grounding the VLOGIC pin or both VLOGIC and VCC does not affect
other devices on the same bus. It is good practice to put a 1F
cap in parallel to 0.1F as close to the VLOGIC pin as possible.
VCC Requirements and Placement
It is recommended to put a 1F capacitor in parallel with 0.1F
decoupling capacitor close to the VCC pin.
Wiper Transition
When stepping up through each tap in voltage divider mode,
some tap transition points can result in noticeable voltage
transients, or overshoot/undershoot, resulting from the sudden
transition from a very low impedance “make” to a much higher
impedance “break” within a short period of time (<1s). There
are several code transitions such as 0Fh to 10h, 1Fh to 20h,
which have higher transient glitch. Note, that all switching
transients will settle well within the settling time as stated in the
datasheet. A small capacitor can be added externally to reduce
the amplitude of these voltage transients. However, that will also
reduce the useful bandwidth of the circuit, thus may not be a
good solution for some applications. It may be a good idea, in
that case, to use fast amplifiers in a signal chain for fast
recovery.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest Rev.
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*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
DATE
REVISION
CHANGE
August 24, 2011
FN7903.1
Page 1 - Replace Figure 1 with Figure 1 from ISL23448
Corrected limits in Analog Spec table for INL, DNL, FSerror, ZSerror, RINL, RDNL, Roffset.
August 19, 2011
FN7903.0
Initial release.