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參數(shù)資料
| 型號： | ISL12024IVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR EEPROM 8-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 960 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，閏年，唯一 ID |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-TSSOP |
| 包裝： | 管件 |
14
FN6370.3
August 18, 2008
about 90ms following the power-up. To trigger the delay, the
VDD must drop below the battery trip point, yet stay above
approximately 1.0V (limit of active circuit operation). After
that, the power-up ramp must be slower than 0.25V/ms to
trigger the delay. To be safe, serial interface software may be
needed to consider the 90ms delay in all power-up routines.
OPTION 1 - STANDARD (POWER CONTROL) MODE
In the Standard Mode, the supply will switch over to the
battery when VDD drops below VTRIP or VBAT, whichever is
lower. In this mode, accidental operation from the battery is
prevented since the battery backup input will only be used
when the VDD supply is shut off.
To select Option 1, BSW bit in the Power Register must be
set to “BSW = 0”. A description of power switchover is as
follows:
Standard Mode Power Switchover
Normal Operating Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
- Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
- Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode (VDD)
The ISL12024 device will switch from the VBAT to VDD
mode when one of the following conditions occurs:
- Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
- Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
There are two discrete situations that are possible when
using Standard Mode: VBAT < VTRIP and VBAT > VTRIP.
These two power control situations are illustrated in Figures
OPTION 2 - LEGACY (POWER CONTROL) MODE
(DEFAULT)
The Legacy Mode follows conditions set in X1226 products.
In this mode, switching from VDD to VBAT is simply done by
comparing the voltages and the device operates from
whichever is the higher voltage. Care should be taken when
changing from Normal to Legacy Mode. If the VBAT voltage is
higher than VDD, then the device will enter battery backup
and unless the battery is disconnected or the voltage
decreases, the device will no longer operate from VDD.
To select Option 2, the BSW bit in the Power Register must
be set to “BSW = 1”.
Normal Mode (VDD) to Battery Backup Mode (VBAT)
To transition from the VDD to VBAT mode, the following
conditions must be met:
VDD < VBAT - VBATHYS
Battery Backup Mode (VBAT) to Normal Mode (VDD)
The device will switch from the VBAT to VDD mode when
the following condition occurs:
VDD > VBAT +VBATHYS
The Legacy Mode power control conditions are illustrated in
Figure 11.
Serial Communication
The device supports the I2C protocol.
Clock and Data
Data states on the SDA line can change only during SCL
LOW. SDA state changes during SCL HIGH are reserved for
indicating start and stop conditions (see Figure 12).
BATTERY
MODE
VDD
2.2V
FIGURE 9. BATTERY SWITCHOVER WHEN VBAT < VTRIP
VBAT
VTRIP
1.8V
VBAT + VBATHYS
VBAT - VBATHYS
BACKUP
FIGURE 10. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
VBAT
In
VOLTAGE
VDD
ON
OFF
FIGURE 11. BATTERY SWITCHOVER IN LEGACY MODE
ISL12024
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| ISL12025IBZ-T | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63VSET RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12025IVZ | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63SET 8 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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