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參數(shù)資料
| 型號(hào)： | IS9108-11CS14LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | 100.23 MHz, OTHER CLOCK GENERATOR, PDSO14 |
| 封裝： | SOIC-14 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 1089K |
| 代理商： | IS9108-11CS14LF |
Integrated
Circuit
Systems, Inc.
AV9108
CPU Frequency Generator
Block Diagram
AV9108RevB032195
General Description
The AV9108 offers a tiny footprint solution for generating two
simultaneous clocks. One clock, the REFCLK, is a fixed output
frequency which is the same as the input reference crystal (or
clock). The other clock, CLK1, can vary between 2 and 120
MHz, with up to 16 selectable preprogrammed frequencies
stored in internal ROM.
The ICS9108 is ideal for use in a 3.3V system. It can generate
a 66.66 MHz clock at 3.3V. In addition, the ICS9108 provides
a symmetrical wave form with a worst case duty cycle of 45/55.
The ICS9108 has very tight edge control between the CPU
clock and 2XCPU clock outputs, with a worst case skew of
250ps.
The device has advanced features which include on-chip loop
filters, tristate outputs, and power-down capability. A mini-
mum of external components - two decoupling capacitors and
an optional ferrite bead - are all that are required for jitter-free
operation. Standard versions for computer motherboard appli-
cations are the AV9108-03, AV9108-05 and the ICS9108-10.
Custom masked versions, with customized frequencies and
features, are available in 6-8 weeks for a small NRE fee.
Features
Runs up to 80 MHz at 3.3V
50/50 typical duty cycle at 5V
±250ps absolute jitter
Generates frequencies from 2 to 140 MHz
2 to 32 MHz input reference frequency
Up to 16 frequencies stored internally
Patented on-chip Phase Locked Loop with VCO for clock
generation
Provides reference clock and synthesized clock
On-chip loop filter
Low power 0.8 CMOS technology
8-pin or 14-pin DIP or SOIC package
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