參數(shù)資料
型號: IS6MC256K
廠商: Integrated Silicon Solution, Inc.
英文描述: 256KB Secondary cache Module(256KB 次級高速緩沖存儲器模塊)
中文描述: 256KB的二級緩存模塊(256KB的次級高速緩沖存儲器模塊)
文件頁數(shù): 2/4頁
文件大小: 44K
代理商: IS6MC256K
IS6MC256K
2
Integrated Silicon Solution, Inc.
SR004-1B-297
ISSI
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GND
TIO1
TIO7
TIO5
TIO3
NC
VCC5
NC
CADV
GND
COE
CWE5
CWE7
CWE1
VCC5
CWE3
NC
NC
GND
NC
A4
A6
A8
A10
VCC5
A17
GND
A9
A14
A15
NC
PD0
PD2
PD4
GND
CLK0
GND
D63
VCC5
D61
D59
D57
GND
D55
D53
D51
D49
GND
D47
D45
D43
VCC5
D41
D39
D37
GND
D35
D33
D31
VCC5
D29
D27
D25
GND
D23
D21
D19
VCC5
D17
D15
D13
GND
D11
D9
D7
VCC5
D5
D3
D1
GND
GND
TIO0
TIO2
TIO6
TIO4
NC
VCC3
TWE
CADS
GND
CWE4
CWE6
CWE0
CWE2
VCC3
CCS
GWE
BWE
GND
A3
A7
A5
A11
A16
VCC3
NC
GND
A12
A13
ADSP
ESC1
ESC2
PD1
PD3
GND
NC
GND
D62
VCC3
D60
D58
D56
GND
D54
D52
D50
D48
GND
D46
D44
D42
VCC3
D40
D38
D36
GND
D34
D32
D30
VCC3
D28
D26
D24
GND
D22
D20
D18
VCC3
D16
D14
D12
GND
D10
D8
D6
VCC3
D4
D2
D0
GND
T
PIN CONFIGURATION
PIN DESCRIPTIONS
A17-A3
A17-A5
CLK0
D63-D0
TIO7-TIO0
PD0-PD4
COE
Address Inputs
Tag Address Inputs
Clock Input
Cache Data Inputs/Outputs
Tag Inputs/Outputs
Presence Detect Pins
Cache Data Output Enable Input
Tag Write Enable Input
Cache Data Write Enable Input
Cache Data Chip Enable Input
Cache Address Status Input
Processor Address Status Input
Burst Address Advance
Global Write Input
Byte Write Enable Input
Expansion Chip Select Input
Expansion Chip Select Output
TWE
CWE
7-
CWE
0
CCS
CADS
ADSP
CADV
GWE
BWE
ECS
1
ECS
2
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