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參數(shù)資料
| 型號： | IS61S6432-7PQI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | 64K X 32 CACHE SRAM, 7 ns, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大?。?/td> | 140K |
| 代理商： | IS61S6432-7PQI |
PB
Integrated Silicon Solution, Inc.
1-800-379-4774
Rev.
B
06/28/01
IS61S6432
ISSI
READ CYCLE TIMING: PIPELINE
Single Read
High-Z
High-Z
DATA
OUT
DATA
IN
OE
CE3
CE2
CE1
BW4-BW1
BWE
GW
A15-A0
ADV
ADSC
ADSP
CLK
RD1
RD2
1a
2c
2d
3a
Unselected
Burst Read
t
KQX
t
KC
t
KL
t
KH
t
SS
t
SH
t
SS
t
SH
t
AS
t
AH
t
WS
t
WH
t
WS
t
WH
RD3
t
CES
t
CEH
t
CES
t
CEH
t
CES
t
CEH
CE2 and CE3 only sampled with ADSP or ADSC
CE1 Masks ADSP
Unselected with CE2
t
OEQ
t
OEQX
t
OELZ
t
KQLZ
t
KQ
t
OEHZ
t
KQHZ
ADSC initiate read
ADSP is blocked by CE1 inactive
t
AVH
t
AVS
Suspend Burst
Pipelined Read
2a
2b
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS61S6432-7TQ | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-7TQI | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
| IS61S6432-8PQ | Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC -40 to 85 |
| IS61S6432-8TQ | 64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61S6432-8TQI | Octal D-Type Transparent Latches With 3-State Outputs 20-PDIP -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS61SF12832-8.5TQ | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61SF25618-8.5TQI | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP |
| IS61SF25618-8.5TQI-TR | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8.5ns 100-Pin TQFP T/R |
| IS61SF51218T-10TQ | 制造商:Integrated Silicon Solution Inc 功能描述:SRAM Chip Sync Single 3.3V 8M-Bit 512K x 16 10ns 100-Pin TQFP |
| IS61SP12836-133B | 制造商:Integrated Silicon Solution Inc 功能描述: |
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