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參數(shù)資料
| 型號(hào)： | IS61LV6424-15TQ |
| 英文描述： | 64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY |
| 中文描述： | 64K的× 24 HIGH-SPEED的CMOS靜態(tài)RAM為3.3V電源 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 138K |
| 代理商： | IS61LV6424-15TQ |
IS61LV6424
Integrated Circuit Solution Inc.
AHSR012-0D
S2-99
1
2
3
4
5
6
7
8
9
10
11
12
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-9
-10
-12
-15
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
9
—
10
—
12
—
15
—
ns
t
AA
Address Access Time
—
9
—
10
—
12
—
15
ns
t
AV
V/
S
Access Time
—
9
—
10
—
12
—
15
ns
t
OH
Output Hold Time
From MUX Change
3
—
3
—
3
—
3
—
ns
t
OHA
Output Hold Time
From Address Change
3
—
3
—
3
—
3
—
ns
t
ACE
t
ACE
2
CE1
Access Time
CE2 Access Time
—
9
—
10
—
12
—
15
ns
t
DOE
OE
Access Time
—
5
—
5
—
6
—
7
ns
t
HZOE
(2)
OE
to High-Z Output
0
3
0
3
0
3
0
3
ns
t
LZOE
(2)
OE
to Low-Z Output
0
—
0
—
0
—
0
—
ns
t
HZCE
(2)
t
HZCE
2
(2)
CE2 to High-Z Output
CE1
to High-Z Output
0
5
0
5
0
6
0
7
ns
t
LZCE
(2)
t
LZCE
2
(2)
CE2 to Low-Z Output
CE
to Low-Z Output
3
—
3
—
3
—
3
—
ns
Notes:
1. Test conditions assume signal transition times of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
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| IS61LV6424-9TQ | 64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS61LV6424-15TQI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x24 SRAM |
| IS61LV6424-9TQ | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY |
| IS61LV6424-9TQI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x24 SRAM |
| IS61LV6432 | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
| IS61LV6432-117PQ | 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:64K x 32 SYNCHRONOUS PIPELINE STATIC RAM |
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