參數(shù)資料
型號(hào): IS61LV256AL
廠商: Integrated Silicon Solution, Inc.
英文描述: 32K x 8 LOW VOLTAGE CMOS STATIC RAM
中文描述: 32K的× 8低電壓CMOS靜態(tài)RAM
文件頁(yè)數(shù): 5/13頁(yè)
文件大?。?/td> 105K
代理商: IS61LV256AL
IS61LV256AL
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/17/06
5
AC TEST LOADS
Figure 1.
Figure 2.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-10 ns
Min.
-12 ns
Min.
Symbol
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
(2)
t
HZOE
(2)
t
LZCE
(2)
t
HZCE
(2)
t
PU
(3)
t
PD
(3)
Parameter
Max.
Max.
Unit
Read Cycle Time
10
12
ns
Address Access Time
10
12
ns
Output Hold Time
2
2
ns
CE
Access Time
10
12
ns
OE
Access Time
5
5
ns
OE
to Low-Z Output
0
0
ns
OE
to High-Z Output
5
5
ns
CE
to Low-Z Output
3
3
ns
CE
to High-Z Output
5
6
ns
CE
to Power-Up
0
0
ns
CE
to Power-Down
10
12
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
31
9
Ω
30 pF
Including
jig and
scope
353
Ω
OUTPUT
3.3V
31
9
Ω
5 pF
Including
jig and
scope
353
Ω
OUTPUT
3.3V
相關(guān)PDF資料
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IS61LV256AL-10J 32K x 8 LOW VOLTAGE CMOS STATIC RAM
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IS61LV256AL-10JLI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256K 32Kx8 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray