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參數(shù)資料
| 型號： | IS61LV256AL-10TI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 10 ns, PDSO28 |
| 封裝： | 8 X 13.40 MM, MO-183, TSOP1-28 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 105K |
| 代理商： | IS61LV256AL-10TI |
IS61LV256AL
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/17/06
7
AC WAVEFORMS
WRITE CYCLE NO. 1
(
CE
Controlled,
OE
is HIGH or LOW)
(1 )
DATA UNDEFINED
t
WC
VALID ADDRESS
t
SCE
t
PWE1
t
PWE2
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
D
IN
DATA
IN
VALID
t
LZWE
t
SD
CE_WR1.eps
WRITE CYCLE SWITCHING CHARACTERISTICS
(1,2)
(Over Operating Range)
-10 ns
Min.
-12 ns
Min.
Symbol
t
WC
t
SCE
t
AW
Parameter
Max.
Max.
Unit
Write Cycle Time
10
—
12
—
ns
CE
to Write End
8
—
8
—
ns
Address Setup Time
to Write End
8
—
8
—
ns
t
HA
Address Hold
from Write End
0
—
0
—
ns
t
SA
t
PWE
1
t
PWE
2
t
SD
t
HD
t
HZWE
(3)
t
LZWE
(3)
Address Setup Time
0
—
0
—
ns
WE
Pulse Width (
OE
HIGH)
7
—
8
—
ns
WE
Pulse Width (
OE
LOW)
10
—
12
—
ns
Data Setup to Write End
6.5
—
7
—
ns
Data Hold from Write End
0
—
0
—
ns
WE
LOW to High-Z Output
—
3.5
—
5
ns
WE
HIGH to Low-Z Output
0
—
0
—
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of
CE
LOW and
WE
LOW. All signals must be in valid states to initiate a
Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising
or falling edge of the signal that terminates the Write.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
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PDF描述 |
|---|---|
| IS61LV256AL-10TL | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| IS61LV256AL | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| IS61LV256AL-10J | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| IS61LV256AL-10JI | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| IS61LV256AL-10JL | 32K x 8 LOW VOLTAGE CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS61LV256AL-10TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:32K x 8 LOW VOLTAGE CMOS STATIC RAM |
| IS61LV256AL-10TLI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256K 32Kx8 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LV256AL-10TLI-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256K 32Kx8 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61LV256L-15J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| IS61LV256L-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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