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| 型號： | IS42S32200B-6T |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 2M X 32 SYNCHRONOUS DRAM, 5.5 ns, PDSO86 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-86 |
| 文件頁數(shù)： | 6/56頁 |
| 文件大小： | 537K |
| 代理商： | IS42S32200B-6T |
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IS42S32200B
ISSI
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00C
09/29/03
TRUTH TABLE – COMMANDS AND DQM OPERATION
(1)
FUNCTION
CS
RAS
CAS
WE
DQM
ADDR
DQs
COMMAND INHIBIT (NOP)
H
X
X
X
X
X
X
NO OPERATION (NOP)
L
H
H
H
X
X
X
ACTIVE (Select bank and activate row)
(3)
L
L
H
H
X
Bank/Row
X
READ (Select bank/column, start READ burst)
(4)
L
H
L
H
L/H
(8)
Bank/Col
X
WRITE (Select bank/column, start WRITE burst)
(4)
L
H
L
L
L/H
(8)
Bank/Col
Valid
BURST TERMINATE
L
H
H
L
X
X
Active
PRECHARGE (Deactivate row in bank or banks)
(5)
L
L
H
L
X
Code
X
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
(6,7)
L
L
L
H
X
X
X
LOAD MODE REGISTER
(2)
L
L
L
L
X
Op-Code
X
Write Enable/Output Enable
(8)
—
—
—
—
L
—
Active
Write Inhibit/Output High-Z
(8)
—
—
—
—
H
—
High-Z
NOTES:
1. CKE is HIGH for all commands except SELF REFRESH.
2. A0-A10 define the op-code written to the mode register.
3. A0-A10 provide row address, and BA0, BA1 determine which bank is made active.
4. A0-A7 (x32) provide column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10 LOW disables
auto precharge; BA0, BA1 determine which bank is being read from or written to.
5. A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks precharged and BA0, BA1 are “Don’t Care.”
6. AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
7. Internal refresh counter controls row addressing; all inputs and DQs are “Don’t Care” except for CKE.
8. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
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| IS42S32200B-6TI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-6TL | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-6TLI | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-7T | 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S32200B-6TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S32200B-6TL | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II |
| IS42S32200B-6TLI | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II |
| IS42S32200B-6TL-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
| IS42S32200B-6T-TR | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R |
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