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參數(shù)資料
| 型號(hào)： | IS42S16400A |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 1梅格位× 16位× 4銀行（64兆位）同步動(dòng)態(tài)RAM |
| 文件頁(yè)數(shù)： | 1/55頁(yè) |
| 文件大小： | 472K |
| 代理商： | IS42S16400A |
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Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev.C
04/16/03
1
IS42S16400A
ISSI
Copyright 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
FEATURES
Clock frequency:166, 133, 100 MHz
Fully synchronous; all signals referenced to a
positive clock edge
Internal bank for hiding row access/precharge
Single 3.3V power supply
LVTTL interface
Programmable burst length
– (1, 2, 4, 8, full page)
Programmable burst sequence:
Sequential/Interleave
Self refresh modes
4096 refresh cycles every 64 ms
Random column address every clock cycle
Programmable
CAS
latency (2, 3 clocks)
Burst read/write and burst read/single write
operations capability
Burst termination by burst stop and precharge
command
Byte controlled by LDQM and UDQM
Industrial temperature availability
(133MHz, 100MHz)
Package:
400-mil 54-pin TSOP II,
a lead-free package is available.
OVERVIEW
ISSI
's 64Mb Synchronous DRAM IS42S16400A s organized
as 1,048,576 bits x 16-bit x 4-bank for improved
performance. The synchronous DRAMs achieve high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT)
SYNCHRONOUS DYNAMIC RAM
April 2003
PIN CONFIGURATIONS
54-Pin TSOP (Type II)
VCC
I/O0
VCCQ
I/O1
I/O2
GNDQ
I/O3
I/O4
VCCQ
I/O5
I/O6
GNDQ
I/O7
VCC
LDQM
WE
CAS
RAS
CS
BA0
BA1
A10
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
GND
I/O15
GNDQ
I/O14
I/O13
VCCQ
I/O12
I/O11
GNDQ
I/O10
I/O9
VCCQ
I/O8
GND
NC
UDQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A11
Address Input
BA0, BA1
Bank Select Address
I/O0 to I/O15
Data I/O
CLK
System Clock Input
CKE
Clock Enable
CS
Chip Select
RAS
Row Address Strobe Command
CAS
Column Address Strobe Command
WE
Write Enable
LDQM
Lower Bye, Input/Output Mask
UDQM
Upper Bye, Input/Output Mask
Vcc
Power
GND
Ground
Vcc
Q
Power Supply for I/O Pin
GND
Q
Ground for I/O Pin
NC
No Connection
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42S16400B1 | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16400B1-7T | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16400C1 | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16400C1-6T | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16400C1-6TL | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S16400A-7T | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II 制造商:Integrated Silicon Solution Inc 功能描述:SDRAM, 4M x 16, 54 Pin, Plastic, TSOP |
| IS42S16400A-7TI | 制造商:Integrated Silicon Solution Inc 功能描述:DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II |
| IS42S16400A-7TI-TR | 制造商:Integrated Silicon Solution Inc 功能描述:4Mx16 Synchronous DRAM, 3.3V 7ns 54 TSOP-II, industrial (T&R) |
| IS42S16400B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42S16400B_07 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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