參數(shù)資料
型號: IS41C16257-35KI
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
中文描述: 256K X 16 FAST PAGE DRAM, 35 ns, PDSO40
封裝: 0.400 INCH, PLASTIC, MS-027, SOJ-40
文件頁數(shù): 6/17頁
文件大?。?/td> 160K
代理商: IS41C16257-35KI
IS41C16257
IS41LV16257
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
DR004-1B
05/24/99
ISSI
ELECTRICAL CHARACTERISTICS
(1)
(Recommended Operation Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed
Min.
Max.
Unit
μ
A
I
IL
Input Leakage Current
Any input 0V < V
IN
< Vcc
Other inputs not under test = 0V
Output is disabled (Hi-Z)
0V < V
OUT
< Vcc
I
OH
= –2.5 mA
I
OL
= 2.1 mA
RAS
,
LCAS
,
UCAS
V
IH
–10
10
I
IO
Output Leakage Current
–10
10
μ
A
V
OH
V
OL
Output High Voltage Level
Output Low Voltage Level
2.4
0.4
V
V
I
CC
1
Stand-by Current: TTL
Com.
Ind.
Com. 3.3V
Ind. 3.3V
5V
5V
2
3
1
2
2
1
mA
I
CC
1
Stand-by Current: TTL
RAS
,
LCAS
,
UCAS
V
IH
mA
I
CC
2
I
CC
2
I
CC
3
Stand-by Current: CMOS
Stand-by Current: CMOS
Operating Current:
Random Read/Write
(2,3,4)
Average Power Supply Current
Operating Current:
Fast Page Mode
(2,3,4)
Average Power Supply Current
Refresh Current:
RAS
-Only
(2,3)
Average Power Supply Current
Refresh Current:
CBR
(2,3,5)
Average Power Supply Current
RAS
,
LCAS
,
UCAS
V
CC
– 0.2V
RAS
,
LCAS
,
UCAS
V
CC
– 0.2V
RAS
,
LCAS
,
UCAS
,
Address Cycling, t
RC
= t
RC
(min.)
5V
3.3V
-35
-60
mA
mA
mA
230
170
I
CC
4
RAS
= V
IL
,
LCAS
,
UCAS
,
Cycling t
PC
= t
PC
(min.)
-35
-60
220
160
mA
I
CC
5
RAS
Cycling,
LCAS
,
UCAS
V
IH
t
RC
= t
RC
(min.)
-35
-60
230
170
mA
I
CC
6
RAS
,
LCAS
,
UCAS
Cycling
t
RC
= t
RC
(min.)
-35
-60
230
170
mA
Notes:
1. An initial pause of 200
μ
s is required after power-up followed by eight
RAS
refresh cycles (
RAS
-Only or CBR) before proper device
operation is assured.The eight
RAS
cycles wake-up should be repeated any time the t
REF
refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each fast page cycle.
5. Enables on-chip refresh and address counters.
相關(guān)PDF資料
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IS41C16257-35T 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
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