
IRU3055
9
Rev. 1.4
08/13/02
www.irf.com
Through an internal resistor, there will be an additional
voltage drop above the node Comp and then the voltage
sent to the PWM comparator will be higher and the gen-
erated duty cycle for phase-2 will be larger. As a result,
the inductor (L2) current will go up until the current bal-
ance is achieved. For accurate current sharing, the cur-
rent sense from each inductor should be as symmetri-
cal as possible. The layout is critical and the layout of
the RC network should be as follows:
Connect the node from Resistor R1 (or R2) directly to
the pad of inductor. Connect the other node of capacitor
C1 and C2 together and connect to the output voltage
terminal. In this case, the voltage at node C1 and C2
will have a common reference voltage that is output volt-
age. If the inductor inherent resistance as well as PCB
trace are almost identical or symmetrical, almost per-
fect current sharing can be obtained. The PCB connec-
tion from three inductors to the output capacitor should
have the same length and width. The feedback point from
the output should be located such that the effect imped-
ances from the three inductors to the output feedback
sensing point are almost symmetrical or identical so
that the noise will cancel each other. The current shar-
ing accuracy is dependent upon the mismatch among
the values of current sensing components and the cur-
rent amplifier offset. It is recommended that all the in-
ductors be from the same manufacturer and also be the
same model so that mismatch will be minimized and
the cost reduced. In most cases, with a good layout, the
difference between 3-channel currents can be limited to
be below 2A.
Operation of IRU3055
Over Current Protection
The IRU3055 senses the MOSFET switching current to
achieve the over current protection. The diagram is shown
in Figure 8. A resistor (R
SET
) is connected between pin
OCSet and the drain of the low side MOSFET for phase1.
Inside the IC, there is an internal 160
μ
A current source
connected to OCSet pin. When the upper switch is turned
off, the inductor current flows through the low side switch.
The voltage at OCSet pin is given as:
V
OCSet
= 160
μ
A
×
R
SET
- R
DS(ON)
×
i
L1
---(2)
Figure 8 - Diagram of the over current sensing.
R
L
R1
×
C1=(1~3)
×
L
It is shown that the output current ripple is greatly re-
duced by multi-phase operation. At the certain duty cycle
D=1/m, where m is the phase number, the output ripple
will be near zero due to complete cancelation of inductor
current ripple. The optimum number of phases exists for
different applications.
Output Inductor Current Sensing
Figure 7 - Loss-less inductive current sensing
and current sharing.
The loss-less sensing current is achieved by sensing
the voltage across the inductor. In Figure 7, L1 and L2
are inductors. R
L1
and R
L2
are inherent inductor resis-
tance. The resistor R1 and capacitor C1 are used to
sense the average inductor current. The voltage across
the capacitors C1 and C2 represent the average current
flowing into resistance R
L1
and R
L2
. The time constant of
the RC network should be equal or at most three times
larger than the time constant L/R
L
.
In order to minimize the effect of the bias current in
IRU3055, the sensing resistor should be as small as
possible. However, a small resistor will result in high
power dissipation and a high value capacitor, a trade off
has to be chosen. Typically, a 1
μ
F ceramic capacitor is
a good start. In the Application Circuit (1), L=1
μ
H and
R
L
=1.6m
. The sensing resistor and capacitor is cho-
sen as:
The voltage across the sensing capacitors are sent to
the pins CS1 and CS2. Suppose the inductor current in
the inductor L2 is smaller than in inductor L1 and the
voltage across capacitor C1 will be greater than that
across C2. The transconductance amplifier in IRU3055
will generate a positive current flowing into node Comp.
R1= 1.5K and C1= 1
μ
F
L1
R
L1
R1
L2
R
L2
R2
C2
IRU3055
Comp
V
SET
Fb
CS1
CS2
Master
Error Amp
P2 Duty Cycle
Adj
P2 Ramp
P1 Ramp
C1
V
OUT
L1
R
SET
IRU3055
OCSet
OCGnd
10uA
160uA
SS
Phase 1
V
OUT
Hiccup
Logic