參數(shù)資料
型號(hào)： IRU3004
廠商： International Rectifier
英文描述： RES 374R 1/10W 1% 805 TF
中文描述： 5位可編程同步降壓控制器IC具有雙LDO控制器
文件頁(yè)數(shù)： 13/17頁(yè)
文件大小： 104K
代理商： IRU3004
IRU3004
13
Rev. 1.7
07/16/02
www.irf.com
With the maximum heat sink temperature calculated in
the previous step, the heat-sink-to-air thermal resistance
(
θ
SA
) is calculated as follows:
Assuming T
A
= 35
8
C:
The same heat sink as the one selected for the switcher
MOSFETs is also suitable for the 1.5V regulator. It is
also possible to use TO-263 package or even the
MTD3055VL in D-Pak if the load current is less than
1.5A. For the 2.5V regulator, since the dropout voltage
is only 0.8V and the load current is less than 0.5A, for
most applications, the same MOSFET without heat sink
or for low cost applications, one can use PN2222A in
TO-92 or SOT-23 package.
LDO Regulator Component Selection
Since the internal voltage reference for the linear regula-
tors is set at 1.5V for all devices, there is no need to
divide the output voltage for the 1.5V, GTL+ regulator.
For the 2.5V Clock supply, the resistor dividers are se-
lected per following:
1+
( )
Where:
Rt = Top resistor divider
R
B
= Bottom resistor divider
Vref = 1.5V typical
Assuming Rt = 100
, for Vo = 2.5V:
For 1.5V output, Rt can be shorted and R
B
left open.
However, it is recommended to leave the resistor divid-
ers as shown in the typical application circuit so that
the output voltage can be adjusted higher to account for
the trace resistance in the final board layout.
It is also recommended that an external filter be added
on the linear regulators to reduce the amount of the high
frequency ripple at the output of the regulators. This can
simply be done by the resistor capacitor combination
as shown in the application circuit.
Disabling the LDO Regulators
The LDO controllers can easily be disabled by connect-
ing the feedback pins (V
FB1
and V
FB2
) to a voltage higher
than 1.5V such as 5V for all devices.
Switcher Output Voltage Adjust
As was discussed earlier, the trace resistance from the
output of the switching regulator to the Slot 1 can be
used to the circuit advantage and possibly reduce the
number of output capacitors, by level shifting the DC
regulation point when transitioning from light load to full
load and vice versa. To account for the DC drop, the
output of the regulator is typically set about half the DC
drop that results from light load to full load. For example,
if the total resistance from the output capacitors to the
Slot 1 and back to the Gnd pin of the part is 5m
and if
the total
I, the change from light load to full load is
14A, then the output voltage measured at the top of the
resistor divider which is also connected to the output
capacitors in this case, must be set at half of the 70mV
or 35mV higher than the DAC voltage setting. To do this,
the top resistor of the resistor divider (R12 in the appli-
cation circuit) is set at 100
, and the R13 is calculated.
For example, if DAC voltage setting is for 2.8V and the
desired output under light load is 2.835V, then R13 is
calculated using the following formula:
V
DAC
(Vo - 1.004
×
V
DAC
( )
Note:
The value of the top resistor must not exceed 100
.
The bottom resistor can then be adjusted to raise the
output voltage.
Soft-Start Capacitor Selection
The soft-start capacitor must be selected such that dur-
ing the start up, when the output capacitors are charg-
ing up, the peak inductor current does not reach the
current limit threshold. A minimum of 1
μ
F capacitor in-
sures this for most applications. An internal 10
μ
A cur-
rent source charges the soft-start capacitor which slowly
ramps up the inverting input of the PWM comparator
V
FB3
. This insures the output voltage to ramp at the same
rate as the soft-start cap thereby limiting the input cur-
rent. For example, with 1
μ
F and the 10
μ
A internal cur-
rent source the ramp up rate is (
V/
t)=(I/C)=1V/100ms.
Assuming that the output capacitance is 9000
μ
F, the
maximum start up current will be:
I = 9000
μ
F
×
(1V / 100ms) = 0.09A
T = Ts - T
A
= 118 - 35 = 83
8
C
Temperature Rise Above Ambient
83
3.6
P
D
θ
SA
= T
8
C/W
Vo =
×
V
REF
R
B
Rt
R
B
=
Rt
Vo
V
REF
100
2.5
1.5
( )
- 1
- 1
R13 = 100
×
(
)
R13 = 100
×
= 11.76K
(2.835 - 1.004
2.800)
( )
Select 11.8K
, 1%
2.8
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