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參數(shù)資料
| 型號(hào)： | IRU1120 |
| 廠商： | International Rectifier |
| 英文描述： | 2A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR |
| 中文描述： | 第2A低壓差型正，可調(diào)式穩(wěn)壓器 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 61K |
| 代理商： | IRU1120 |
IRU1120
4
Rev. 1.3
08/20/02
www.irf.com
APPLICATION INFORMATION
Introduction
The IRU1120 adjustable regulator is a five-terminal de-
vice designed specifically to provide extremely low drop-
out voltages comparable to the PNP type without the
disadvantage of the extra power dissipation due to the
base current associated with PNP regulators. This is
done by bringing out the control pin of the regulator that
provides the base current to the power NPN and con-
necting it to a voltage that is grater than the voltage present
at the V
IN
pin. This flexibility makes the IRU1120 ideal
for applications where dual inputs are available such as
a computer mother board with an ATX style power sup-
ply that provides 5V and 3.3V to the board.
The IRU1120 is specifically designed to meet the fast
current transient needs as well as providing an accurate
initial voltage, reducing the overall system cost with the
need for fewer number of output capacitors.
Output Voltage Setting
The IRU1120 can be programmed to any voltage in the
range of 1.25V to 5.5V by using two external resistors.
The output voltage is defined as:
Where:
V
REF
= 1.25V Typically
I
ADJ
< 1
μ
A Typically
R
1
and R
2
as shown in Figure 3:
Figure 3 - Typical application of the IRU1120
for programming the output voltage.
The IRU1120 keeps a constant 1.25V between the ad-
just pin and the ground pin. By replacing a resistor (R2),
between these two pins, a constant current flows through
R1, subtracting the I
ADJ
current out of the R1 to set the
overall output voltage. Notice that since the I
ADJ
is typi-
cally in the range of 1
μ
A, it only adds a small error to
the output voltage which is negligible.
Figure 2 - Simplified block diagram of the IRU1120.
BLOCK DIAGRAM
V
CTRL
V
IN
Gnd
2
1
3
4
V
OUT
THERMAL
SHUTDOWN
1.25V
5
V
ADJ
+
+
CURRENT
LIMIT
V
OUT
R1
R2
V
IN
V
CTRL
I
ADJ
= 1uA
IRU1120
Adj
V
OUT
V
CTRL
V
IN
Gnd
V
OUT
= V
REF
×
1+
+I
ADJ
×
R1
(
)
R1
R2
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