參數(shù)資料
型號: IRU1050-33
廠商: International Rectifier
英文描述: 5A LOW DROPOUT POSITIVE FIXED 3.3V REGULATOR
中文描述: 第5A低壓差型正,固定3.3V穩(wěn)壓器
文件頁數(shù): 6/12頁
文件大?。?/td> 75K
代理商: IRU1050-33
6
Rev. 1.8
08/20/02
IRU1050
www.irf.com
V
ESR
V
ESL
V
C
T
LOAD
CURRENT
LOAD CURRENT RISE TIME
1050plt1-1.0
Vc = t
C 7500
×
I 2
×
4.6
C
IN
=4.6
μ
F
0.15
×
50
ESR =(V
IN
- V
OUT
-
V - V
DROP
)
I
ESR = (5 - 3.5 - 1.2 - 0.15)
4.6
ESR
37
4.6
Type of V
OUT
I
MAX
Max Allowed
Processor Nominal Output Tolerance
Intel-P54C VRE 3.50 V 4.6 A
±
100 mV
Figure 5 - Typical regulator response
to the fast load current step.
An example of a regulator design to meet the Intel P54C
VRE specification is given below.
Assume the specification for the processor as shown in
Table 1:
Table 1 - Processor Specification
The first step is to select the voltage step allowed in the
output due to the output capacitor’s ESR:
1) Assuming the regulator’s initial accuracy plus the re-
sistor divider tolerance is
≈ ±
53mV (
±
1.5% of 3.5V
nominal), then the total step allowed for the ESR and
the ESL is
47mV.
Assuming that the ESL drop is
10mV, the remain-
ing ESR step will be
37mV. Therefore the output
capacitor ESR must be:
The Sanyo MVGX series is a good choice to achieve
both price and performance goals. The 6MV1500GX,
1500
μ
F, 6.3V has an ESR of less than 36m
typi-
cal. Selecting 5 of these capacitors in parallel has an
ESR of
7.2m
which achieves our design goal.
The next step is to calculate the drop due to the ca-
pacitance discharge and make sure that this drop in
voltage is less than the selected ESL drop in the
previous step.
R2 = V
R1 = 1.25-1
×
121 = 217.8
REF
-1
)
V
OUT
3.5
2) The output capacitance is 5
×
1500
μ
F = 7500
μ
F
Where:
t = 2
μ
s is the regulator response time
To set the output DC voltage, we need to select R1 and
R2:
3) Assuming R1=121
, 0.1%:
Select R2=218
, 0.1%
Selecting both R1 and R2 resistors to be 0.1% toler-
ance, results in the least amount of error introduced
by the resistor dividers leaving
≈ ±
1.3% error budget
for the IRU1050 reference which is within the initial
accuracy of the device.
Finally, the input capacitor is selected as follows:
4) Assuming that the input voltage can drop 150mV be-
fore the main power supply responds, and that the
main power supply response time is
50
μ
s, then
the minimum input capacitance for a 4.6A load step
is given by:
The ESR should be less than:
Where:
V
DROP
L
Input voltage drop allowed in step 4
V
L
Maximum regulator dropout voltage
I
L
Load current step
Selecting two Sanyo 1500
μ
F, the same type as the
output capacitors, meets our requirements.
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