參數(shù)資料
型號： IRU1030-33CT
廠商： International Rectifier
英文描述： VOLT REGULATOR|FIXED|+3.3V|BIPOLAR|SIP|3PIN|PLASTIC
中文描述： 電壓調節(jié)器|定額| 3.3 |雙極|園區(qū)| 3針|塑料
文件頁數(shù)： 6/11頁
文件大?。?/td> 70K
代理商： IRU1030-33CT
6
Rev. 1.3
08/20/02
IRU1030
www.irf.com
Figure 5 - Typical regulator response to
the fast load current step.
An example of a regulator design to meet the Intel
Pentium Pro GTL+ specification is given below.
Assume the specification for the processor as shown in
Table 1:
Table 1 - GTL+ Specification for Pentium Pro
The first step is to select the voltage step allowed in the
output due to the output capacitor’s ESR:
1) Assuming the regulator’s initial accuracy plus the re-
sistor divider tolerance is
≈
±
30mV (
±
2% of 1.5V nomi-
nal), then the total step allowed for the ESR and the
ESL, is
120 mV.
Assuming that the ESL drop is
10mV, the remain-
ing ESR step will be
110mV. Therefore the output
capacitor ESR must be:
The Sanyo MVGX series is a good choice to achieve
both price and performance goals. The 6MV1500GX,
1500
μ
F, 6.3V has an ESR of less than 36m
typ.
Selecting a single capacitor achieves our design goal.
The next step is to calculate the drop due to the ca-
pacitance discharge and make sure that this drop in
voltage is less than the selected ESL drop in the
previous step.
V
ESR
V
ESL
V
C
T
LOAD
CURRENT
LOAD CURRENT RISE TIME
1030plt1-1.0
C
IN
= 2.7
μ
F
0.15
×
50
ESR = (3.3 - 1.5 - 1.2 - 0.15)
2.7
ESR =(V
IN
- V
OUT
-
V - V
DROP
)
I
Vc = t
C
×
I
2
×
2.7
1500
2) With the output capacitance being 1500
μ
F:
Where:
t = 2
μ
s is the regulator response time
To set the output DC voltage, we need to select R1 and
R2:
3) Assuming R1 = 121
, 0.5%:
Select R2 = 24.3
, 0.5%
Selecting both R1 and R2 resistors to be 0.5% toler-
ance, results in the least amount of error introduced
by the resistor dividers leaving
≈
±
1.3% error budget
for the IRU1030 reference which is within the initial
accuracy of the device.
Finally, the input capacitor is selected as follows:
4) Assuming that the input voltage can drop 150mV be-
fore the main power supply responds, and that the
main power supply response time is
≈
50
μ
s, then
the minimum input capacitance for a 2.7A load step
is given by:
The ESR should be less than:
Where:
V
DROP
L
Input voltage drop allowed in step 4
V
L
Maximum regulator dropout voltage
I
L
Load current step
Selecting a single 1500
μ
F the same type as the output
capacitors exceeds our requirements. However, the same
input capacitor can also support the second regulator
for the other end of termination.
R2 = V
R1 = 1.25-1
×
121 = 24.2
REF
-1
V
OUT
1.5
Type of V
OUT
I
MAX
Max Allowed
Processor Nominal Output Tolerance
Pentium Pro 1.50 V 2.7 A
±
150 mV
ESR
≤
110
2.7
相關PDF資料
PDF描述
IRU1050 5A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR
IRU1050CM 5A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR
IRU1050CP 5A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR
IRU1050CT 5A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR
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