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參數(shù)資料
| 型號(hào)： | IRS2548DSPBF |
| 廠商： | International Rectifier |
| 文件頁數(shù)： | 16/22頁 |
| 文件大?。?/td> | 320K |
| 描述： | IC PFC |
| 特色產(chǎn)品： | IRS2548D LED Driver |
| 標(biāo)準(zhǔn)包裝： | 55 |
| 系列： | * |
IRS2548D
www.irf.com
?2011 International Rectifier
16
RVBUS1
RVBUS2
RVBUS
CCOMP
LPFC
MPFC
RPFC
DFPC
CBUS
(+)
(-)
RZX
PFC
Control
VBUS
COMP
PFC
ZX
COM
OC
ROC
Figure 6: IRS2548D simplified PFC control circuit.
The VBUS pin is regulated against a fixed internal
4V reference voltage for regulating the DC bus
voltage (Figure 7). The feedback loop is performed
by an operational transconductance amplifier (OTA)
that sinks or sources a current to the external
capacitor at the COMP pin. The resulting voltage
on the COMP pin sets the threshold for the charging
of the internal timing capacitor and therefore
determines the on-time of MPFC.
4
3
1
Q
S
R Q
2.0V
VBUS
COMP
ZX
5.1V
4.0V
OTA1
4.3V
5
PFC
Q
S
R
2
Q
R
1
COMP3
COMP4
COMP5
RS
3
RS
4
VCC
Fault Mode Signal
M1
WATCH
DOG
TIMER
M2
C1
3.0V
Discharge
VCC to
UVLO-
COMP2
6
OC
1.2V
Figure 7: IRS2548D detailed PFC control
circuit.
The off-time of MPFC is determined by the time it
takes the LPFC current to fall to zero. A positive-
going edge at the ZX input exceeding the internal
2V threshold (VZXTH+) signals the beginning of
the off-time and the following negative-going edge
falling below 1.7V (VZXTH+ - VZXHYS) occurs
when the LPFC current discharges to zero which
signals the end of the off-time and MPFC is turned
on again (Figure 8). The cycle repeats itself
indefinitely until the PFC section is disabled due to
a fault detected by the system section (Fault
Mode), an over-voltage on the DC bus or the
negative transition of ZX pin voltage does not
occur. Should the negative edge at ZX not be
detected, MPFC will remain off until the watch-dog
timer forces it to turn-on again after a fixed delay.
Should the OC pin exceed the 1.2V (VOCTH+)
over-current threshold during the on-time, the PFC
output will turn off. The circuit will then wait for a
negative-going transition on the ZX pin or a forced
turn-on from the watch-dog timer to turn the PFC
output on again.
I
LPFC
PFC
ZX
OC
1.2V
. . .
. . .
. . .
. . .
Figure 8: Inductor current, PFC pin, ZX pin and
OC pin timing diagram.
On-time Modulation Circuit
A fixed on-time of MPFC over an entire cycle of the
line input voltage produces a peak inductor current
which naturally follows the sinusoidal shape of the
line input voltage. The smoothed averaged line
input current is in phase with the line input voltage
for high power factor but some harmonic distortion
is left. This is mostly due to cross-over distortion of
the line current near the zero-crossings of the line
input voltage. To achieve lower harmonics that
comply with international standards such as
EN61000-3-2 class C and general market
requirements an additional on-time modulation
circuit in included in the PFC control. This circuit
dynamically increases the on-time of MPFC as the
line input voltage nears the zero-crossings (Figure
9). This causes the peak LPFC current and
therefore the smoothed line input current to
increase slightly near the zero-crossings of the line
input voltage to compensate for cross over
distortion which reduces the THD and higher
harmonics.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IRS2548DSPBF | 制造商:International Rectifier 功能描述:IC LED DRVR SOIC |
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