參數(shù)資料
型號(hào): IRS20955SPBF
廠商: International Rectifier
英文描述: PROTECTED DIGITAL AUDIO DRIVER
中文描述: 受保護(hù)的數(shù)字音頻驅(qū)動(dòng)程序
文件頁(yè)數(shù): 16/21頁(yè)
文件大?。?/td> 524K
代理商: IRS20955SPBF
IRS20955
(
S
)
PbF
PRELIMINARY
www.irf.com
16
Supplying V
DD
V
DD
is designed to be supplied with an internal
Zener diode clamp. I
DD
, the supply current for V
DD
,
can be estimated by:
I
DD
1.5 mA x 300 x 10
-9
x switching frequency +
0.5 mA + 0.5 mA
(Dynamic
(Static) (Zener bias)
The value of R
DD
used to supply I
DD
should meet the
following requirement:
V
R
DD
power
consumption)
DD
B
I
V
8
10
+
[
]
Example: In the case where the average PWM
switching frequency is 400 kHz, the required I
DD
is
1.18 mA. Based on this calculation, a 50 V power
supply voltage would require R
DD
to be 33 k
or
less.
Furthermore, make sure I
DD
is below the maximum
zener diode bias current, I
DDZ
, during static state
conditions.
V
I
DDZ
mA
Rdd
V
B
5
8
10
+
IRS20955S
12V
VDD
IN
CSD
VSS
COM
OCSET
LO
VCC
HO
VS
DT
CSH
VB
-B
Vcc
+B
PWM
VREF
NC
NC
10.4V
Rdd
Figure 18. Supplying V
DD
Charging V
BS
Prior to Start
The high-side bootstrap capacitor can be charged
through a resistor from the positive supply bus to the
V
B
pin by utilizing an internal 20.8 V Zener diode
between V
B
and V
S
. This scheme eliminates the
need to charge the boot strap capacitor through low-
side turn on during start-up.
The value of this charging resistor is subject to
several constraints:
-
The minimum value of R
CHARGE
is limited by
the leakage current of the bootstrap voltage
supply through
RCHARGE
, which would limit
the maximum PWM modulation index of the
system.
-
The maximum value of R
CHARGE
is limited by
the current charge capability of the resistor
during startup:
I
I
>
where I
CHARGE
= the current through
R
CHARGE
I
QBS
= the high side quiescent
current.
QBS
CHARGE
2
2
I
I
Figure 19. Boot Strap Supply Pre-charging
Start-up Sequence (UVLO)
The protection control block in the IRS20955S
monitors the status of V
DD
and V
CC
to ensure that
both voltage supplies are above the UVLO (under-
voltage lockout) threshold before beginning normal
operation. If either V
DD
or V
CC
is below the under
voltage threshold, LO and HO are disabled in
shutdown mode until both V
DD
and V
CC
rise above
the voltage threshold.
Power-down Sequence
As soon as V
DD
or V
CC
falls below the UVLO
threshold, protection logic in the IRS20955S turns
off LO and HO, shutting off the power MOSFETs.
Figure 20. IRS20955 UVLO Timing Chart
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