參數(shù)資料
型號: IRS20124S
廠商: International Rectifier
英文描述: DIGITAL AUDIO DRIVER WITH DISCRETE DEAD-TIME AND PROTECTION
中文描述: 數(shù)字音頻驅(qū)動與離散死區(qū)時間和保護
文件頁數(shù): 2/24頁
文件大?。?/td> 218K
代理商: IRS20124S
IRS20124S(PbF)
2
www.irf.com
Symbol
V
B
Vs
V
HO
V
CC
V
LO
V
IN
V
OC
V
OCSET1
V
OCSET2
dVs/dt
Pd
Rth
JA
T
J
T
S
T
L
Definition
Min.
-0.3
VB-20
Vs-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-
-
-
-
-55
-
Max.
220
VB+0.3
VB+0.3
20
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
50
1.25
100
150
150
300
Units
V
V
V
V
V
V
V
V
V
V/ns
W
°C/W
°
C
°
C
°
C
High side floating supply voltage
High side floating supply voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Input voltage
OC pin input voltage
OCSET1 pin input voltage
OCSET2 pin input voltage
Allowable Vs voltage slew rate
Maximum power dissipation
Thermal resistance, Junction to ambient
Junction Temperature
Storage Temperature
Lead temperature (Soldering, 10 seconds)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. All currents are defined positive into any lead. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Description
The IRS20124S is a high voltage, high speed power MOSFET driver with internal dead-time and shutdown
functions specially designed for Class D audio amplifier applications.
The internal dead time generation block provides accurate gate switch timing and enables tight dead-time
settings for better THD performances.
In order to maximize other audio performance characteristics, all switching times are designed for immunity
from external disturbances such as VCC perturbation and incoming switching noise on the DT pin. Logic
inputs are compatible with LSTTL output or standard CMOS down to 3.0V without speed degradation. The
output drivers feature high current buffers capable of sourcing 1.0A and sinking 1.2A. Internal delays are
optimized to achieve minimal dead-time variations. Proprietary HVIC and latch immune CMOS technologies
guarantee operation down to Vs= –4V, providing outstanding capabilities of latch and surge immunities with
rugged monolithic construction.
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