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參數(shù)資料
| 型號(hào)： | IRMDSS1 |
| 廠商： | International Rectifier |
| 英文描述： | IR1110 Soft Start IC Reference Design Kit For AC Motor Drives, UPS, Welders, and other applications |
| 中文描述： | IR1110軟啟動(dòng)IC參考設(shè)計(jì)套件交流電機(jī)驅(qū)動(dòng)器，不間斷電源，焊工，和其他應(yīng)用程序 |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 121K |
| 代理商： | IRMDSS1 |
5
IRMDSS1
(1)
Control of an externally applied 1.4 to 4.0V (nominal) reference
voltage, VBUSREF, applied between JP4/1 and JP4/2. (JP4/1
negative with respect to JP4/2)
For test purposes, the bus voltage can be controlled
manually, by connecting a 50k
O
potentiometer between JP4/1
and JP4/3, and changing R52 to 4.53k, (1%).
Control of the potentiometer resistance from 0 to 50k
controls VBUSREF from approximately 4.0V to 1.4V . This
controls the dc bus voltage from maximum to approximately
35% of the maximum value obtained at maximum input line
voltage; e.g. for the factory setting of 550V rms maximum
input voltage, the minimum regulated bus voltage is about
270V dc.
It should be noted that the potentiometer floats at the
potential of the positive terminal of the SCR bridge. Care must
be taken to ensure that
the knob of the potentiometer is
properly isolated
, to avoid the possibility for electrical shock
when manually adjusting the potentiometer.
(2)
A PWM signal can be applied to the input of opto-coupler U5,
between JP5/1 and JP5/2, as shown in Fig 6. The opto-coupler
provides isolation between the PWM input source and the
IR 1110, which floats at the potential of the positive terminal of
the rectifier.
The frequency of the PWM signal should be in the 1 to 5kHz
range.
The relationship between the ON/OFF duty cycle, D, of the PWM
input and the dc bus voltage is approximately:
VBUS = VBUSmax (0.35 + 0.65D
)
VBUSmax is the maximum bus voltage at maximum input
voltage.
The bus voltage is regulated to within approximately +-8V, for
a change of line voltage of +-80V.
Rise and fall rates of the bus voltage that are driven by
changes in the duty cycle, D, (hence in the average value of
VBUSREF), are determined by the rate of change of D, and by
the load characteristics. The rate of increase of D should be
limited to avoid excessive bus capacitor charging current.
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