- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄45276 > IR80C52XXX-12:R (ATMEL CORP) 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | IR80C52XXX-12:R |
| 廠商： | ATMEL CORP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁(yè)數(shù)： | 17/81頁(yè) |
| 文件大?。?/td> | 663K |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)
24
ATtiny28L/V
1062F–AVR–07/06
enable bit, INT0 in GIMSK is set (one), the MCU will jump to the interrupt vector. The
flag is cleared when the interrupt routine is executed. Alternatively, the flag can be
cleared by writing a logical “1” to it. This flag is always cleared when INT0 is configured
as level interrupt.
Bit 5 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny28 and always reads as zero.
Bit 4 – TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set (one) when an overflow occurs in Timer/Counter0. TOV0 is cleared
by hardware when executing the corresponding interrupt handling vector. TOV0 is
cleared by writing a logical “1” to the flag. When the SREG I-bit, TOIE0 in ICR and TOV0
are set (one), the Timer/Counter0 Overflow interrupt is executed.
Bit 3..0 - Res: Reserved Bits
These bits are reserved bits in the ATtiny28 and always read as zero.
Note:
1. One should not try to use the SBI (Set Bit in I/O Register) instruction to clear individ-
ual flags in the Register. This will result in clearing all the flags in the register,
because the register is first read, then modified and finally written, thus writing ones
to all set flags. Using the CBI (Clear Bit in I/O Register) instruction on IFR will result in
clearing all bits apart from the specified bit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR83C154TXXX-20P883D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MQ80C52TXXX-20:D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| MR80C32-20/883:RD | 8-BIT, 20 MHz, MICROCONTROLLER, CQCC44 |
| MR80C32-16/883R | 8-BIT, 16 MHz, MICROCONTROLLER, CQCC44 |
| MC80C52CXXX-30P883 | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IR80C86-2 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:16-Bit Microprocessor |
| IR80C88 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:16-Bit Microprocessor |
| IR80C88-2 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:16-Bit Microprocessor |
| IR-820 | 制造商:BOWEI 制造商全稱(chēng):BOWEI 功能描述:Image Rejection Mixers |
| IR8200 | 制造商:IRF 制造商全稱(chēng):International Rectifier 功能描述:3A, 55V DMOS H-BRIDGE |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。