![](http://datasheet.mmic.net.cn/30000/MQ83C154DXXX-25-883R_datasheet_2377229/MQ83C154DXXX-25-883R_780.png)
780
6384E–ATARM–05-Feb-10
AT91SAM9G20
41.9.2
Write Timings
Note:
1. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr
hold length” or “NWE hold length”.
HOLD SETTINGS (ncs rd hold
≠ 0)
SMC
10
Data Setup before NCS High
9.2
7.6
ns
SMC
11
Data Hold after NCS High
0
ns
HOLD or NO HOLD SETTINGS (ncs rd hold
≠ 0, ncs rd hold = 0)
SMC12
NBS0/A0, NBS1, NBS2/A1, NBS3,
A2 - A25 valid before NCS High
(ncs rd setup +
ncs rd pulse)*
tCPMCK -0.8
(ncs rd setup +
ncs rd pulse)*
tCPMCK -0.6
ns
SMC
13
NRD low before NCS High
(ncs rd setup +
ncs rd pulse -
nrd setup)*
t
CPMCK -0.2
(ncs rd setup +
ncs rd pulse -
nrd setup)*
t
CPMCK -0.3
ns
SMC14
NCS Pulse Width
ncs rd pulse
length * tCPMCK +
0.1
ncs rd pulse
length * tCPMCK -
0.1
ns
Table 41-27. SMC Read Signals - NCS Controlled (READ_MODE= 0) (Continued)
Table 41-28. SMC Write Signals - NWE controlled (WRITE_MODE = 1)
Symbol
Parameter
Min
Units
1.8V Supply
3.3V Supply
HOLD or NO HOLD SETTINGS (nwe hold
≠ 0, nwe hold = 0)
SMC15
Data Out Valid before NWE High
nwe pulse *
t
CPMCK -0.8
nwe pulse *
t
CPMCK -0.8
ns
SMC
16
NWE Pulse Width
nwe pulse *
t
CPMCK -0.4
nwe pulse *
t
CPMCK -0.4
ns
SMC
17
NBS0/A0 NBS1, NBS2/A1, NBS3, A2
- A25 valid before NWE low
nwe setup *
tCPMCK -0.5
nwe setup *
tCPMCK -0.5
ns
SMC
18
NCS low before NWE high
(nwe setup - ncs
rd setup + nwe
pulse) * tCPMCK -
0.2
(nwe setup - ncs
rd setup + nwe
pulse) * tCPMCK -
0.2
ns
HOLD SETTINGS (nwe hold
≠ 0)
SMC
19
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25
change
nwe hold * t
CPMCK
-0.4
nwe hold *
tCPMCK -0.4
ns
SMC
20
NWE High to NCS Inactive
(1)(nwe hold - ncs
wr hold)* t
CPMCK -
0.3
(nwe hold - ncs
wr hold)* t
CPMCK
-0.3
ns
NO HOLD SETTINGS (nwe hold = 0)
SMC21
NWE High to Data OUT, NBS0/A0
NBS1, NBS2/A1, NBS3, A2 - A25,
3.4
3.1
ns