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參數(shù)資料
| 型號： | IR22381QPBF |
| 廠商： | International Rectifier |
| 英文描述： | 3-PHASE AC MOTOR CONTROLLER IC |
| 中文描述： | 3相AC電機控制IC |
| 文件頁數(shù)： | 24/30頁 |
| 文件大小： | 1133K |
| 代理商： | IR22381QPBF |
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IR22381Q
PBF
/IR21381Q
(
P
b
F
)
24
V
V
V
V
V
6
5
9
11
1
18
=
=
And the bootstrap capacitor must be:
nF
V
nC
C
BOOT
51
6
133
=
≥
NOTICE:
Here above
V
CC
has been chosen to
be 18V as an example. IGBTs can be supplied
with higher/lower supply accordingly to design
requirements. Vcc variations due to low voltage
power supply must be accounted in the above
formulas.
Some important considerations
a. Voltage ripple
There are three different cases making the
bootstrap circuit get conductive (see Figure 23)
I
LOAD
< 0; the load current flows in the low side
IGBT displaying relevant V
CEon
V
V
=
In this case we have the lowest value for V
BS
.
This represents the worst case for the bootstrap
capacitor sizing. When the IGBT is turned off the
Vs node is pushed up by the load current until the
high side freewheeling diode get forwarded
biased
I
LOAD
= 0; the IGBT is not loaded while being
on and V
CE
can be neglected
V
V
=
I
LOAD
> 0; the load current flows through the
freewheeling diode
V
V
=
In this case we have the highest value for V
BS
.
Turning on the high side IGBT, I
LOAD
flows into it
and V
S
is pulled up.
To minimize the risk of undervoltage, bootstrap
capacitor should be sized according to the I
LOAD
<0
case.
b. Bootstrap Resistor
A resistor (R
boot
) is placed in series with bootstrap
diode (see Figure 23) so to limit the current when
the bootstrap capacitor is initially charged. We
suggest not exceeding some Ohms (typically 5,
maximum 10 Ohm) to avoid increasing the V
BS
time-
CEon
V
F
CC
BS
V
F
CC
BS
V
FP
F
CC
BS
V
V
+
constant. The minimum on time for charging the
bootstrap capacitor or for refreshing its charge must
be verified against this time-constant.
c. Bootstrap Capacitor
For high
T
HON
designs where is used an electrolytic
tank capacitor, its ESR must be considered. This
parasitic resistance forms a voltage divider with
R
boot
generating a voltage step on V
BS
at the first
charge of bootstrap capacitor. The voltage step and
the related speed (dV
BS
/dt) should be limited. As a
general rule, ESR should meet the following
constraint:
ESR
+
Parallel combination of small ceramic and large
electrolytic
capacitors
compromise, the first acting as fast charge thank for
the gate charge only and limiting the dV
BS
/dt by
reducing the equivalent resistance while the second
keeps the V
BS
voltage drop inside the desired
V
BS
.
d. Bootstrap Diode
The diode must have a BV> 600V (or 1200V
depending on application) and a fast recovery time
(trr < 100 ns) to minimize the amount of charge fed
back from the bootstrap capacitor to V
CC
supply.
V
V
R
ESR
CC
BOOT
3
≤
is
normally
the
best
2.2
Gate resistances
The switching speed of the output transistor can be
controlled by properly size the resistors controlling
the turn-on and turn-off gate current. The following
section provides some basic rules for sizing the
resistors to obtain the desired switching time and
speed by introducing the equivalent output
resistance of the gate driver (
R
DRp
and
R
DRn
).
The examples always use IGBT power transistor.
Figure 24 shows the nomenclature used in the
following paragraphs. In addition, V
ge
plateau voltage,
Q
gc
and
Q
ge
indicate the gate to
collector and gate to emitter charge respectively.
*
indicates the
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