參數(shù)資料
型號: IR2159S
廠商: International Rectifier
英文描述: DIMMING BALLAST CONTROL IC
中文描述: 調(diào)光鎮(zhèn)流器控制IC
文件頁數(shù): 19/25頁
文件大?。?/td> 267K
代理商: IR2159S
IR21592/IR21593
(S)
www.irf.com
19
Once lock is achieved, the phase detector (PDET)
outputs short pulses to an open-drain PMOS that
charges the VCO capacitor through an internal
resistor (RFB) each time an error pulse occurs
(Figure 13). This action "nudges" the integrator at
the input of the VCO to keep the phase of the
output stage current exactly locked in phase with
the reference.
ν
REF
ν
FB
V
CS
t
V
VCO
t
LO
ν
ERR
Figure 13, Phase control timing diagram.
The IR21592/IR21593 includes a dimming
interface for analog lamp power control. The
DIM pin input requires a voltage in the range of
0.5 to 5VDC, with 5V corresponding to minimum
phase shift (maximum lamp power). The output
of the dim interface is the voltage on pin MIN,
which is compared with the internal timing
capacitor (CT) voltage to produce a frequency-
independent digital reference phase (Figure 14).
DIM during dimming to increase high-frequency
noise immunity and minimize component count.
Dimming (DIM)
To regulate lamp power, the error between the
reference phase and the phase of the output stage
current forces the VCO to steer the frequency in
the proper direction, as determined by the transfer
function of the output stage, such that the error is
forced to zero. An internal 15uA current source is
connected to pin VCO during dimming mode
(Figure 12) to discharge the VCO capacitor and
decrease the frequency towards lock.
3
7.6V
2
4
CPH
DIM
VCO
11
12
COM
LO
10
CS
16uA
1.6V
Q2
RCS
VCO
16
HO
Q2
15
VS
R
DIM
C
CPH
C
VCO
Half
Bridge
Output
I
LOAD
V
BUS
(+)
V
BUS
(-)
Load
Return
Half
Bridge
Driver
IR2159
DIM
INTERFACE
0.5 to 5V
PHASE
CONTROL
R
FB
VCC
FAULT
LOGIC
R
MAX
R
MIN
5
6
MAX
MIN
Figure 12, IR21592/IR21593 dimming circuitry.
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