
IR2132
B-166 C
ONTROL
I
NTEGRATED
C
IRCUIT
D
ESIGNERS
M
ANUAL
Parameter
Value
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
T
A
Definition
Min.
Max.
V
S1,2,3
+ 20
600
V
B1,2,3
20
5
V
CC
V
SS
+ 5
V
CC
5
5
125
Units
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Low Side and Logic Fixed Supply Voltage
Logic Ground
Low Side Output Voltage
Logic Input Voltage (
HIN1,2,3
,
LIN1,2,3
& ITRIP)
FAULT
Output Voltage
Operational Amplifier Output Voltage
Operational Amplifier Inverting Input Voltage
Ambient Temperature
V
S1,2,3
+ 10
Note 1
V
S1,2,3
10
-5
0
V
SS
V
SS
V
SS
V
SS
-40
°C
Parameter
Value
Symbol
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
FLT
V
CAO
V
CA-
dV
S
/dt
P
D
Definition
Min.
-0.3
Max.
525
Units
High Side Floating Supply Voltage
High Side Floating Offset Voltage
High Side Floating Output Voltage
Low Side and Logic Fixed Supply Voltage
Logic Ground
Low Side Output Voltage
Logic Input Voltage (
HIN1,2,3
,
LIN1,2,3
& ITRIP)
FAULT
Output Voltage
Operational Amplifier Output Voltage
Operational Amplifier Inverting Input Voltage
Allowable Offset Supply Voltage Transient
Package Power Dissipation @ T
A
≤
+25°C
V
B1,2,3
- 25
V
S1,2,3
- 0.3
-0.3
V
CC
- 25
-0.3
V
SS
- 0.3
V
SS
- 0.3
V
SS
- 0.3
V
SS
- 0.3
—
—
—
—
—
—
—
—
-55
—
V
B1,2,3
+ 0.3
V
B1,2,3
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.5
1.6
2.0
83
78
63
150
150
300
V/ns
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
(28 Lead DIP)
(28 Lead SOIC)
(44 Lead PLCC)
W
R
θ
JA
Thermal Resistance, Junction to Ambient
°C/W
T
J
T
S
T
L
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
°C
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to V
S0
. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Note 1: Logic operational for V
S
of (V
S0
- 5V) to (V
S0
+ 600V). Logic state held for V
S
of (V
S0
- 5V) to (V
S0
- V
BS
).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to V
S0
. The V
S
offset rating is tested
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
V
V
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