參數(shù)資料
型號: IR1150STRPBF
廠商: International Rectifier
元件分類: 基準電壓源/電流源
英文描述: UPFC ONE CYCLE CONTROL PFC IC
中文描述: 統(tǒng)一潮流控制器的單周期控制功率因數(shù)校正集成電路
文件頁數(shù): 16/16頁
文件大小: 248K
代理商: IR1150STRPBF
www.irf.com
9
IR1150S/IR1150IS(PbF)
UVLO Mode
The IC remains in the UVLO condition until the voltage
on the VCC pin exceeds the VCC turn on threshold
voltage, VCC ON.
During the time the IC remains in the UVLO state,
the gate drive circuit is inactive and the IC draws a
quiescent current of ICC START. The UVLO mode is
accessible from any other state of operation whenever
the IC supply voltage condition of VCC < VCC UVLO
occurs.
Standby Mode
The IC is in this state if the supply voltage has
exceeded VCC ON and the VFB pin voltage is less
than 20% of VREF . The oscillator is running and all
internal circuitry is biased in this state but the gate is
inactive. This state is accessible from any other state
of operation except OVP. The IC enters this state
whenever the VFB pin voltage has decreased to 50%
of VREF when operating in normal mode or during a
peak current limit fault condition, or 20% VREF when
operating in soft start mode.
Soft Start Mode
This state is activated once the VCC voltage has
exceeded VCCON and the VFB pin voltage has
exceeded 20% of VREF.
The soft start time, which is defined as the time
required for the duty cycle to linearly increase from
zero to maximum, is dependent upon the values
selected for compensation of the voltage loop pin
COMP to pin COM. Throughout the soft start cycle,
the output of the voltage error amplifier (pin COMP)
charges through the compensation network. This
forces a linear rise of the voltage at this node which
in turn forces a linear increase in the gate drive duty
cycle from 0. This controlled duty cycle reduces
system component stress during start up conditions
as the input current amplitude is increasing linearly.
Normal Mode
The IC enters normal operating mode once the soft
start transition has been completed. At this point the
gate drive is switching and the IC draws a maximum
of ICC from the supply voltage source. The device
will initiate another soft start sequence in the event
of a shutdown due to a fault, which activates the
protection circuitry, or if the supply voltage drops below
the UVLO turn off threshold of VCC UVLO.
Fault Protection Mode
The fault mode will be activated when any of the
protection circuits are activated. The IC protection
circuits include Supply Voltage Under Voltage Lockout
(UVLO), Output Over Voltage Protection (OVP), Open
Loop Protection (OLP), Output Undervoltage
Protection (OUV), and Peak Current Limit Protection
(IPK LIMIT).
Sleep Mode
The sleep mode is initiated by pulling the OVP pin
below 0.62V (typ). In this mode the IC draws a very
low quiescent supply current.
Operating States
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