參數(shù)資料
型號: IR1150ISTRPBF
廠商: International Rectifier
文件頁數(shù): 7/16頁
文件大?。?/td> 919K
描述: IC PFC CONTROLLER CCM 8-SOIC
標準包裝: 2,500
模式: 連續(xù)導電(CCM)
頻率 - 開關(guān): 200kHz
電流 - 啟動: 175µA
電源電壓: 15 V ~ 20 V
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
       IR1150(S)/IR1150I(S)(PbF)
www.irf.com 
 
 
 
7
 
General Description 
 
 
The 礟FC IR1150 is intended for boost converters for
power factor correction operating at a fixed frequency in
continuous conduction mode. The IC operates with two
loops; an inner current loop and an outer voltage loop.
The inner current loop is fast, reliable and does not
require sensing of the input voltage in order to create a
current reference.
 
This inner current loop sustains the sinusoidal profile of
the average input current based on the dependency of
the pulse width modulator duty cycle on the input line
voltage in order to determine the analogous input line
current. Thus, the current loop uses the embedded
input voltage signal to control the average input current
to follow the input voltage.
 
The IR1150 enables excellent THD performance. In
light load conditions, a small distortion occurs at zero-
crossing due to the finite boost inductance but this is
negligible   and   well   within   EN61000-3-2   Class   D
specifications.
 
The outer voltage loop controls the DC bus voltage.
This voltage is fed into the voltage error amplifier to
control the slope of the integrator ramp and sets the
amplitude of the average input current.
 
The two loops combine to control the amplitude, phase
and shape of the input current, with respect to the input
voltage, giving near-unity power factor.
 
The IC is designed for robust operation and provides
protection from system level over current, over voltage,
under voltage, and brownout conditions.
 
 
IC Supply 
 
The UVLO circuit monitors the VCC pin and maintains the
gate drive signal inactive until the VCC pin voltage
reaches the UVLO turn on threshold, (V
CC ON
). As soon as
the VCC voltage exceeds this threshold, provided that the
V
FB
 pin voltage is greater than 20%VREF, the gate drive
will begin switching (under Soft Start) and increase the
pulse width to its maximum value as demanded by the
output voltage error amplifier. If the voltage on the VCC
pin falls below the UVLO turn off threshold, (V
CC UVLO
), the
IC turns off, gate drive is terminated, and the turn on
threshold must again be exceeded in order to re-start the
process and move into Soft Start mode. 
 
Soft Start 
 
Soft Start controls the rate of rise of the output voltage
error amplifier in order to obtain a linear control of the
increasing duty cycle as a function of time. The Soft Start
time is controlled by voltage error amplifier compensation
components selected, and is user programmable based
on desired loop crossover frequency.
 
Frequency Select 
 
The switching frequency of the IC is programmable by an
external   resistor   at   the   FREQ   pin.   The   design
incorporates min/max restrictions such that the minimum
and maximum operating frequency fall within the range of
50-200kHz. 
 
Gate Drive 
 
The gate drive is a totem pole driver with 1.5A capability.
If higher currents are required, additional external drivers
can be used. 
 
 
 
 
 
 
 
 
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