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參數(shù)資料
| 型號： | IQX320-10PP391 |
| 英文描述： | User Programmable Special Function ASIC |
| 中文描述： | 用戶可編程ASIC的特殊功能 |
| 文件頁數(shù)： | 22/65頁 |
| 文件大?。?/td> | 620K |
| 代理商： | IQX320-10PP391 |
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IQX Family Data Sheet
22
Revision 5.0
June 2000
1.5 JTAG-based Configuration Controller
In the IQX devices, the I/O attributes and Switch Matrix
connections can be programmed using the JTAG serial bus.
Additionally, the RapidConfigure Interface, used for quickly
changing I/O Port Configurations and Switch Matrix connections,
can be enabled or disabled using the JTAG serial bus.
The JTAG-based serial mode is always available for
configuration regardless of whether the RapidConfigure mode is
enabled or disabled. However proper care must be taken when
switching between JTAG and RapidConfigure for configuring the
devices. The user must ensure that the RapidConfigure mode is
first disabled by using JTAG serial mode to set the RC bit to zero
in the Mode Control Register before attempting to change Switch
Matrix connections or I/O Port configuration through JTAG.
In most cases, the user does not need to know the details of the
JTAG protocol. The I-Cube supplied software will automatically
generate the necessary bit streamfroma higher-level textual
description of the required configuration.
1.5.1 JTAG Interface
The JTAG interface is a serial interface and uses five pins: Test
Data In (TDI), Test Data Out (TDO), Test Clock (TCK), Test
Mode Select (TMS) and Test Reset (TRST*. TCK is used to
clock data in and out of TDI and TDO. TMS, in conjunction with
TDI implements a state machine that controls the various
operations of the JTAG protocol. Data on the TDI and TMS pins
is clocked into the IQX device on the rising edge of the TCK
signal, while the valid data appears on the TDO pin after the
falling edge of TCK. On the IQX devices, TRST*is used to reset
both the device and the JTAG controller.
1.5.2 I/O Port Configuration
I/O Port configuration is accomplished by loading the appropriate
bit streaminto the programmng registers present at each I/O
Port. The JTAG serial bus is used to load configuration data into
the I/O Port programmng registers, one I/O Port at a time.
1.5.3 Switch Matrix Configuration
The contents of the SRAM cells controlling Switch Matrix
connections can be modified using the JTAG. This is
accomplished by loading the configuration data, one word at a
time into the SRAM cells in the Switch Matrix.
1.5.4 Mode Control Register Configuration
The IQX device contains a Mode Control Register. Some bits in
the register are used to store user flags such as RapidConfigure
Enable, and certain non-user flags required for proper
functioning of the device. The contents of this register can be
changed using the JTAG interface. Refer to Table 10 for details.
IQX320, IQX240B
IQX160
IQX128B
Operation
Control Bus
(P/S, C[1:0])
Row Add.
RA[8:0]
Col. Add.
CA [8:0]
Row Add.
RA[7:0]
Col. Add.
CA[7:0]
Row Add.
RA[6:0]
Col. Add.
CA[6:0]
Clear All Switch Matrix
SRAM Cells (Break
Connections)
111
000000000
000100000
00000000
00100000
0000000
0100000
Clear All Switch Matrix
SRAM Cells (Break
Connections) and Set All I/O
Ports to Power-on
Default Function [Input (IN)]
111
000000000
001100000
00000000
01100000
0000000
1100000
Table 8. RapidConfigure Reset Commands
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