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參數(shù)資料
| 型號(hào)： | IO54VXI |
| 文件頁數(shù)： | 2/2頁 |
| 文件大?。?/td> | 48K |
| 代理商： | IO54VXI |
VXI Specifications
Interface Compatibility
Type
VXI Revision
Size
Configuration
Interrupt Level
TTLTRG 0-7
Memory
Power Requirements
All modules
IO53 / IO130
Cooling Requirements
Per-slot Average
Airflow
Message-based, servant only
1.3 and 1.4
C-size, single slot
Static or Dynamic
Programmable
Input or output, selectable in groups of two
A24 RAM, 256K
+5 volts
±12, ±24 volts user selectable
65 W typical, 77 W maximum
6L / sec @ 0.38 mm water pressure for
10o C temp. rise
Environmental Specifications
Temperature
Storage = -40o C to +75o C
Operating (typ) = 25o C ± 10o C
Operating (max) = 0o C to +50o C
Software Drivers
National InstrumentsLabWindows
National InstrumentsLabView
National InstrumentsLabWindows/CVI
300 S. Lemon Creek Dr., Suite A
Walnut CA
91789
Phone: (909)595-6030
FAX: (909)595-7177
E-Mail: info@interfacetech.com
Web: http://www.interfacetech.com
SPECIFICATIONS
Original Oct 98
The IO100VXI and IO50VXI Digital Input/Output modules were devel-
oped for use in process control, microprocessor cycle emulation, bus cycle
emulation, process simulation and functional board or circuit test applica-
tions. All modules are single slot, C-size VXI modules, with the IO100VXI
providing up to 128 channels of digital I/O and the IO50VXI providing up
to 64 channels of digital I/O. Each group of 8 channels may be software
configured as either input or output. Tristate control of outputs allow for
emulation of bidirectional data and control buses. Four 50-pin IDC con-
nectors are provided on the IO100VXI front panel; two on the IO50VXI.
Each I/O connector provides (32) I/O channels, (4) I/O handshake strobes,
and (4) tristate control/output enable inputs.
All modules utilize a high level, SCPI compatible command set for setup
and control of I/O channels. Thy also support VME dual-ported RAM
and registers. I/O pins may be programmed by sending high-level com-
mands or with direct, high speed VME read/writes, the same as might be
used for register-based instruments. Using this combination of program-
ming formats results in the best of both worlds, high functionality and high
speed.
Memory emulation and block I/O modes allow autonomous operation
from the local microprocessor. Data fields may be programmed from 1 bit
to 32 bits wide. Multiple data fields may be defined, allowing I/O pins to
be grouped together based on function. Double latching the outputs allows
all output channels to transition at the same time regardless of field size or
the number of fields defined. Latching the inputs allows a full 128-bit wide
read with a single command (64 channels for the IO50VXI). Utilizing the
VXITTLTRG lines, modules may be linked together for even wider I/O
channel groups.
The IO130VXI and IO53VXI use 32 output channels to drive 30 optically
isolated solid state relays. This allows the module to control high voltage
applications up to 100 volts. Switched voltages can be either user supplied
or selected from +5, ± 12 , and ± 24 volts available from the VXI backplane.
Both modules use a mezzanine board to provide the switched high voltage
outputs. Other input and output logic formats can be supported via user
supplied mezzanine boards.
The IO54 and IO140 modules are the latest additions to the IO50 / IO100
family. The IO54 provides 32 Differential TTL I/O channels, each pro-
vided with a switchable 100 ohm termination. The IO140 provides 32
differential I/O channels with switchable 100 ohm terminations, plus 64
TTL I/O channels. Differential I/O channels meet RS-422-A standard.
Both modules support external I/O handshaking. IO140 TTL channels are
the same as the IO100 TTL channels described above.
Model
IO50
IO51
IO52
IO53
IO54
IO100
IO110
IO120
IO130
IO140
I/O Channels
64
64
64
32 Outputs + 32
32 Diff. I/O
128
128
128
30 Outputs + 96
32 Diff. I/O + 64 TTL I/O
Logic Family
FTTL
ACTTTL/CMOS
TTL Open Collector
Solid State Relay + FTTL I/O
Differential TTL
FTTL
ACTTTL/CMOS
TTL Open Collector
Solid State Relay + FTTL I/O
Differential TTL + TTL
Logic Families:
FTTL
IO100/IO50
Vol*
Vil
Iol
15 ns, max.
3 ns/3 ns
Vol*
Iol
20 ns, max.
4 ns/4 ns
Vol*
Vil
Iol
20 ns, max.
3 ns
0.55 V
0.8 V
64 mA
Voh**
Vih
Ioh
2.4 V
2.0 V
-3 mA
Skew****
Rise/Fall
CMOS
IO110/IO51
Skew****
Rise/Fall
Open Collector
IO120/IO52
0.5 V
24 mA
Voh**
Ioh
3.7 V
-24 mA
0.42 V
0.8 V
64 mA
Voh**
Vih
Ioh***
5.0 V
2.0 V
0.5 mA
Skew****
Rise/Fall
Switched
IO130/IO53
Max Voltage
Turn on/off Time
On Resistance
Isolation
Carry Current
Differential TTL
IO140
100 V peak AC/DC
4 ms
20 ohm max.
Optical, 3750 V
120 mA
Vol*
Vil
Iol
21 ns, max.
14 ns/14 ns (typical)
0.50 V
0.8 V
20 mA
Voh**
Vih
Ioh
2.5 V
2.0 V
-20 mA (max)
Skew****
Rise/Fall
Handshake and Control:
(except Switched High Voltage Outputs)
Byte Available/Request
Data Valid/Acknowledge
Tristate Control Inputs
Output Enable Inputs
Per I/O connector
Per I/O connector
1 per byte (except IO120/IO52)
1 per byte (IO120/IO52 only)
*
**
***
****
Maximum voltage at minimum load.
Minimum voltage at maximum load.
Depends on pullup resistor value.
Channel-to-channel skew. Add 50 ns for channel-to-channel
skew across multiple cards.
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