9
INA115
FIGURE 2. Switched-Gain Instrumentation Amplifier (minimum components).
SWITCHED GAIN
Figure 2 shows a circuit for digital selection of four gains.
Multiplexer “on” resistance does not significantly affect gain.
The resistor values required for some commonly used gain
steps are shown. This circuit uses the internal 25k
feedback
resistors, so the resistor values shown cannot be scaled to a
different impedance level.
Figure 3 shows an alternative switchable gain configuration.
This circuit does not use the internal 25k
feedback resistors,
so the nominal values shown can be scaled to other impedance
levels. This circuit is ideal for use with a precision resistor
network to achieve excellent gain accuracy and lowest gain
drift.
NOISE PERFORMANCE
The INA115 provides very low noise in most applications. For
differential source impedances less than 1k
, the INA103
may provide lower noise. For source impedances greater than
50k
, the INA111 FET-Input Instrumentation Amplifier may
provide lower noise.
Low frequency noise of the INA115 is approximately
0.4
μ
Vp-p measured from 0.1 to 10Hz. This is approximately
one-tenth the noise of “l(fā)ow noise” chopper-stabilized ampli-
fiers.
OFFSET TRIMMING
The INA115 is laser trimmed for very low offset voltage and
drift. Most applications require no external offset adjustment.
Figure 4 shows an optional circuit for trimming the output
offset voltage. The voltage applied to Ref terminal is summed
at the output. Low impedance must be maintained at this node
to assure good common-mode rejection. This is achieved by
buffering the trim voltage with an op amp as shown.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA115 is extremely high—
approximately 10
10
. However, a path must be provided for
the input bias current of both inputs. This input bias current is
typically less than
±
1nA (it can be either polarity due to
cancellation circuitry). High input impedance means that this
input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
if the INA115 is to operate properly. Figure 5 shows various
provisions for an input bias current path. Without a bias
current return path, the inputs will float to a potential which
exceeds the common-mode range of the INA115 and the input
amplifiers will saturate. If the differential source resistance is
low, a bias current return path can be connected to one input
(see thermocouple example in Figure 5). With higher source
impedance, using two resistors provides a balanced input with
possible advantages of lower input offset voltage due bias
current and better common-mode rejection.
A
0
A
1
Gain
L
H
L
H
L
L
H
H
1
Highest
R
1
(
)
R
2
(
)
R
3
(
)
R
4
(
)
GAIN STEPS
1, 10, 100, 1000
1, 2, 4, 8
1, 2, 5, 10
0, +3, +6, +9dB
2.5k
12.5k
15k
17.7k
55.6
12.5k
10k
60.3k
500
12.5k
10k
25k
2.5k
12.5k
15k
17.7k
A
1
A
2
A
3
12
11
10
25k
25k
25k
25k
5
4
V
IN
V
IN
INA115
V
O
–
+
Over-Voltage
Protection
25k
25k
Over-Voltage
Protection
Feedback
15
14
3
2
8
1
HI-509
8
–15V
+15V
16
1
2
14
3
15
9
4
5
6
7
10
11
12
13
R
1
R
2
R
3
R
4
A
1
A
0
Enable