![](http://datasheet.mmic.net.cn/230000/INA101AG_datasheet_15584672/INA101AG_5.png)
INA101
5
INPUT NOISE VOLTAGE
vs FREQUENCY (100
≤
GAIN
≤
1000)
Frequency (Hz)
I
√
H
0
1000
100
10
1
10
100
1000
OUTPUT NOISE vs GAIN
Gain (V/V)
O
0
30
20
10
0
10
100
1000
R
S
= 1M
R
S
= 1000k
R
S
= 10k
R
S
= 0
SETTLING TIME vs GAIN
Gain (V/V)
S
1
100
1000
10
1000
100
10
1%
R
= 2k
C
L
= 1000pF
0.01%
0.1%
(1)
G = 1 +
TYPICAL PERFORMANCE CURVES
(CONT)
At +25
°
C, V
CC
=
±
15V unless otherwise noted.
40k
R
G
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA101. (Pin numbers shown are for the TO-100
metal package.) Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output Common terminal which
is normally grounded. This must be a low-impedance con-
nection to assure good common-mode rejection. A resis-
tance greater than 0.1
in series with the Common pin will
cause common-mode rejection to fall below 106dB.
SETTING THE GAIN
Gain of the INA101 is set by connecting a single external
resistor, R
G
:
The 40k
term in equation (1) comes from the sum of the
two internal feedback resistors. These are on-chip metal film
resistors which are laser trimmed to accurate absolute val-
ues. The accuracy and temperature coefficient of these
resistors are included in the gain accuracy and drift specifi-
cations of the INA101.
The stability and temperature drift of the external gain
setting resistor, R
G
, also affects gain. R
G
’s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance which will contribute additional gain error (possi-
bly an unstable gain error) in gains of approximately 100 or
greater. The gain sense connections on the DIP and SOL-16
packages (see Figure 2) reduce the gain error produced by
wiring or socket resistance.