參數(shù)資料
型號(hào)： INA-12063-TR1
英文描述： 1.5 GHz Low Noise Self-Biased Transistor Amplifier
中文描述： 1.5 GHz的低噪聲自偏置晶體管放大器
文件頁(yè)數(shù)： 15/24頁(yè)
文件大?。?/td> 351K
代理商： INA-12063-TR1
6-130
The
Touchstone
circuit file for
this step is shown in Figure 15.
DIM
FREQ GHZ
RES OH
LNG IN
CKT
MSUB ER=4.8 H=0.031
T=0.001 RHO=1 RGH=0
S2P 1 2 3 TYP25B.S2P
MLIN 3 4 W=0.015 L=0.030
VIA 4 0 D1=0.025
D2=0.025 H=0.031
T=0.001
RES 2 0 R=600 ! R1
DEF2P 1 2 INA12
TERM
Z0 = 50
OUT
INA12 K
INA12 B1
INA12 DB[S21]
INA12 DB[GMAX]
! INA12 MAG[GMN]
! INA12 ANG[GMN]
! INA12 MAG[GM2]
! INA12 ANG[GM2]
FREQ
SWEEP 0.1 3.1 0.1
Figure 15. CAD File for Stability
Analysis and Conjugate Match.
The value of the shunt resistor,
R1, is varied while observing the
resulting K. While a 600
resistor
is found to stabilize the circuit at
900 MHz (K=1.46), there still
exists a possibility of oscillation
at 100 MHz with the worst case
value of K = 0.72. There are two
options at this point: (a) lower
the value of the shunt resistor,
which trades additional stability
for circuit gain and output power,
or (b) use a frequency selective
circuit to resistive load the device
only at lower frequencies.
In the interest of circuit simplicity
(meeting the objective of low
cost) the shunt resistor value was
lowered to 290
. This value
resulted in a K > 1 over the full
frequency range at a trade-off in
gain of 1.7 dB. (The stability
measure criteria, B1 > 0, was also
verified.)
Results of this step:
A 290
shunt resistor was added
to the output of the INA-12063 for
stability.
5. Allow for DC connections.
The required DC connections to
be made to this example amplifier
are: +3 volts to the RF Output
and V
d
terminals (Pins 4 & 6), a
suitable bias current into I
bias
(Pin 1), and Pins 2 and 5 to
ground. The RF Input (Pin 3) and
RF Output should have blocking
capacitors if the amplifier is to be
cascaded with stages that do not
have a DC open circuit.
To set the INA-12063 operating
current to 2.5 mA, a 9.1K
resistor will be connected be-
tween the +3 volt supply and the
I
bias
pin. The DC schematic for
the LNA is shown in Figure 16.
Figure 16. 900 MHz LNA DC
Schematic.
Results of this step:
The DC connections were identi-
fied and will be considered in
choosing the input & output
matching circuits.
6. Design of the input imped-
ance matching network.
Commensurate with the primary
design objective of low noise
figure, the 50
input to the
amplifier stage will be matched to
the conjugate of
Γ
opt
. The value
of
Γ
opt
, 0.53
∠
+36
°
, is found in
the table of Typical Noise Param-
eters for a bias current of 2.5 mA.
(Alternatively, a slightly more
accurate
Γ
opt
could also have
been calculated using the CAD
circuit file in Figure 15, which
includes the RF ground parasitics
and stabilizing resistor.) The
conjugate of
Γ
opt
, 0.53
∠
36
°
, is
plotted on the Smith chart as
Point A in Figure 17. Since Point
A is not sufficiently close to the
R=1 or G=1 circles on the Smith
chart, a single series or shunt
element will not provide an exact
match. (For less critical NF
performance, a simple series
inductor would be adequate for
the input match.) A two-element
matching network will therefore
be required.
Impedances in this region of the
Smith chart can be matched to
50
by either of two possible L-C
combinations, either a shunt
C-series L or a shunt L-series C.
Normally, the shunt L-series C
would be a good choice since its
high pass filter characteristic
would help roll off excess low
end gain. However, a DC blocking
capacitor would be required
between the INA-12063 and the
matching network. Placing
extraneous components within
matching network is usually not
recommended. The shunt C-series
L network is therefore chosen as
the input matching topology.
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