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參數(shù)資料
| 型號(hào)： | IN74LV374N |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Octal Transceivers With Parity Generators/Checkers And 3-State Outputs 24-PDIP -40 to 85 |
| 中文描述： | 八路D型觸發(fā)器陽(yáng)性EDGETRIGGER（3態(tài)） |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 141K |
| 代理商： | IN74LV374N |
IN74LV374
1
O
CTAL
D-T
YPE
F
LIP
-F
LOP
P
OSITIVE
E
DGE
-
T
RIGGER
(3-S
TATE
)
IN74LV374 are compatible by pinning with KP555
ИР
23,
КР
1533
ИР
13, IN74HC374A and IN74HCT374A series. Input
voltage levels are compatible with standard CMOS levels.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
.
Supply voltage range from 2.0 to 3.2 V
LOW input current: 1.0
μ
А
; 0.1
μ
А
at
Т
= 25
°
С
Output current 8 m
А
Latch current value not less than 150 m
А
at
Т
= 125
°
С
ESD acceptable values: not less than 2000 V as per HBM, and
not less than 200 V as per MM
ORDERING INFORMATION
IN74LV374N Plastic DIP
IN74LV374D SOIC
T
A
= -40
°
to 125
°
C
for all packages
BLOCK DIAGRAM
OE
01
Q
0
02
D
0
03
D
1
04
Q
1
05
Q
2
06
D
2
07
D
3
08
Q
3
09
19
18
17
16
15
14
13
12
11
D
7
D
6
Q
6
Q
5
D
5
D
4
Q
4
CP
Q
7
Pin 20=V
CC
Pin 10 = GND
FUNCTION TABLE
Inputs
CP
L, H,
X
Output
Qn
H
L
no change
Z
OE
L
L
L
H
Dn
H
L
X
X
PIN ASSIGNMENT
374
OE
01
Q
0
02
D
0
03
D
1
04
Q
1
05
Q
2
06
D
2
07
D
3
08
Q
3
09
GND
10
20
19
18
17
16
15
14
13
12
11
D
7
D
6
Q
6
Q
5
D
5
D
4
Q
4
CP
V
CC
Q
7
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