- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379227 > IN74LV273N (INTEGRAL JOINT STOCK COMPANY) Octal Transceivers With Parity Generators/Checkers And 3-State Outputs 24-SOIC -40 to 85 PDF資料下載
參數(shù)資料
| 型號： | IN74LV273N |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Octal Transceivers With Parity Generators/Checkers And 3-State Outputs 24-SOIC -40 to 85 |
| 中文描述： | 八路D觸發(fā)器與普通時鐘和復位拖鞋 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 132K |
| 代理商： | IN74LV273N |
TECHNICAL DATA
1
INTEGRAL
Octal D Flip-Flop with Common Clock and Reset
The IN74LV273 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT273.
The IN74LV273 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outputs. The common clock (CP) and master
reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The
state of each D input, one set-up time before the LOW-to-HIGH clock
transition, is transferred to the corresponding output (Qn) of the flip-
flop. All outputs will be forced LOW independently of clock or data
inputs by a LOW voltage level on the MR input. The device is useful for
applications where the true output only is required and the clock and
master reset are common to all storage elements.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
Supply voltage range: 1.2 to 5.5 V
Low input current: 1.0
μ
à; 0.1
μ
à at ò = 25
°
High Noise Immunity Characteristic of CMOS Devices
IN74LV273
N SUFFIX
PLASTIC DIP
DW SUFFIX
SO
1
20
1
20
ORDERING INFORMATION
IN74LV273N
IN74LV273DW
IZ74LV273
T
A
= -40
°
to 125
°
C for all packages
Plastic DIP
SOIC
chip
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
FUNCTION TABLE
Inputs
Output
Reset
Clock
D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X
no change
H
X
no change
H= high level
L = low level
X = don’t care
Z = high impedance
PIN ASSIGNMENT
1
2
3
5
4
6
7
8
9
10
VCC
Q7
20
18
17
16
15
14
19
11
12
13
GND
RESET
Q0
D0
D1
Q1
Q2
D2
D3
Q3
D7
D6
Q6
Q5
D5
D4
Q4
CLOCK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74LV32 | Quad 2-Input OR Gate |
| IN74LV32D | Quad 2-Input OR Gate |
| IN74LV32N | Quad 2-Input OR Gate |
| IN74LV373 | OCTAL D-TYPE TRANSPARENT LATCH (3-STATE) |
| IN74LV373D | OCTAL D-TYPE TRANSPARENT LATCH (3-STATE) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN750A-1JANTX | 制造商:ERJ 功能描述: |
| IN750A1JANTXV | 制造商: 功能描述: |
| IN751A | 制造商: 功能描述: 制造商:undefined 功能描述: |
| IN75232 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:EIA-232-D INTERFACE 1 CHIP IC |
| IN753ARL | 制造商:n/a 功能描述:SAMPLE |
發(fā)布緊急采購，3分鐘左右您將得到回復。