參數(shù)資料
型號(hào): IN74HC573AN
廠商: INTEGRAL JOINT STOCK COMPANY
英文描述: Octal 3-State Noninverting Transparent Latch
中文描述: 八路三態(tài)同相透明鎖存器
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 117K
代理商: IN74HC573AN
TECHNICAL DATA
403
Octal 3-State Noninverting
Transparent Latch
High-Performance Silicon-Gate CMOS
The IN74HC573A is identical in pinout to the LS/ALS573. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
μ
A
High Noise Immunity Characteristic of CMOS Devices
IN74HC573A
ORDERING INFORMATION
IN74HC573AN Plastic
IN74HC573ADW SOIC
T
A
= -55
°
to 125
°
C for all packages
FUNCTION TABLE
Inputs
Output
Output
Enable
Latch
Enable
D
Q
L
H
H
H
L
H
L
L
L
L
X
no change
H
X
X
Z
X = don’t care
Z = high impedance
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
PIN ASSIGNMENT
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