參數(shù)資料
型號: IN74HC4046AN
廠商: INTEGRAL JOINT STOCK COMPANY
英文描述: PHASE-LOCKED LOOP
中文描述: 鎖相環(huán)
文件頁數(shù): 1/11頁
文件大?。?/td> 241K
代理商: IN74HC4046AN
IN74HC4046A
P
HASE
-L
OCKED
L
OOP
High-Performance Silicon-Gate CMOS
1
tector 2. For instance, a signal2 ti
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALSTTL outputs.
The IN74HC4046A phase-locked loop contains three phase
comparators, a voltage-controlled oscillator (VCO) and unity gain op-
amp DEM
OUT
. The comparators have two common signal inputs,
COMP
IN
, and SIG
IN
. Input SIG
IN
and COMP
IN
can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self-bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator 1
(an exclusive OR gate) provides a digital error signal PC1
OUT
and
maintains 90 degrees phase shift at the center frequency between
SIG
IN
and COMP
IN
signals (both at 50% duty cycle). Phase comparator
2 (with leading-edge sensing logic) provides digital error signals
PC2
OUT
and PCP
OUT
and maintains a 0 degree phase shift between
SIG
IN
and COMP
IN
signals (duty cycle is immaterial). The linear VCO
produces an output signal VCO
OUT
whose frequency is determined by
the voltage of input VCO
IN
signal and the capacitor and resistors
connected to pins C1A, C1B, R1 and R2. The unity gain op-amp
output DEM
OUT
with an external resistor is used where the VCO
IN
signal is needed but no loading can be tolerated. The inhibit
input, when high, disables the VCO and all on-amps to minimize
standby power consumption.
Applications
include
FM
and
demodulation, frequency synthesis and multiplication, frequency
discrimination, tone decoding, data synchronization and
conditioning, voltage-to-frequency conversion and motor speed
control.
Low Power Consumption Characteristic of CMOS Device
Operating Speeds Similary to LS/ALSTTL
Wide Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0
μ
A Maximum (except SIG
IN
and COMP
IN
)
Low Quiescent Current: 80
μ
A Maximum (VCO disabled)
High Noise Immunity Characteristic of CMOS Devices
Diode Protection on all Inputs
Pin No.
Symbol
1
PCP
OUT
2
PC1
OUT
3
COMP
IN
4
VCO
OUT
5
INH
6
C1A
7
C1B
8
GND
9
VCO
IN
10
DEM
OUT
11
R1
12
R2
13
PC2
OUT
14
SIG
IN
15
PC3
OUT
16
V
CC
FSK
modulation
and
Name and Function
Phase Comparator Pulse Output
Phase Comparator 1 Output
Comparator Input
VCO Output
Inhibit Input
Capacitor C1 Connection A
Capacitor C1 Connection B
Ground (0 V) V
SS
VCO Input
Demodulator Output
Resistor R1 Connection
Resistor R2 Connection
Phase Comparator 2 Output
Signal Input
Phase Comparator 3 Output
Positive Supply Voltage
ORDERING INFORMATION
IN74HC4046AN Plastic
IN74HC4046AD SOIC
T
A
= -55
°
to 125
°
C for all
packages
PIN ASSIGNMENT
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