- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378628 > IN74HC03AD (INTEGRAL JOINT STOCK COMPANY) Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS PDF資料下載
參數(shù)資料
| 型號(hào)： | IN74HC03AD |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS |
| 中文描述： | 四2輸入與非門與漏極開(kāi)路輸出高性能硅柵CMOS |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大?。?/td> | 176K |
| 代理商： | IN74HC03AD |
IN74HC03A
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
V
IN
V
OUT
I
IN
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±
20
±
25
±
50
V
DC Output Voltage (Referenced to GND)
V
DC Input Current, per Pin
mA
I
OUT
DC Output Current, per Pin
mA
I
CC
DC Supply Current, V
CC
and GND Pins
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg
Storage Temperature
-65 to +150
°
C
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°
C from 65
°
to 125
°
C
SOIC Package: : - 7 mW/
°
C from 65
°
to 125
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
V
IN
, V
OUT
T
A
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
+125
V
°
C
Operating Temperature, All Package Types
-55
t
r
, t
f
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND
≤
(V
IN
or
V
OUT
)
≤
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74HC03AN | Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS |
| IN74HC04A | Hex Inverter High-Performance Silicon-Gate CMOS |
| IN74HC05A | Hex Inverter with Open-Drain Outputs High-Performance Silicon-Gate CMOS |
| IN74HC08 | Quad 2-Input AND Gate |
| IN74HC08A | Quad 2-Input AND Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74HC03AN | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS |
| IN74HC04A | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Hex Inverter High-Performance Silicon-Gate CMOS |
| IN74HC05A | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Hex Inverter with Open-Drain Outputs High-Performance Silicon-Gate CMOS |
| IN74HC08 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input AND Gate |
| IN74HC08A | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad 2-Input AND Gate |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。