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參數(shù)資料
| 型號： | IN74ACT174 |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | HEX D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| 中文描述： | 六角D觸發(fā)器與通用時鐘和復(fù)位次浮點運算 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 163K |
| 代理商： | IN74ACT174 |
IN74ACT174
1
H
EX
D
F
LIP
-F
LOP WITH
C
OMMON
C
LOCK AND
R
ESET
High-Speed Silicon-Gate CMOS
The IN74ACT174 is identical in pinout to the LS/ALS174,
HC/HCT174. The IN74ACT174 may be used as a level converter
for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of six D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition
of the Clock input. Reset is asynchronous and active-low.
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A; 0.1
μ
A @ 25
°
C
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74ACT174N Plastic
IN74ACT174D SOIC
T
A
= -40
°
to 85
°
C for all
packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Clock
X
L
Output
Q
L
H
L
no
change
no
change
Reset
L
H
H
H
D
X
H
L
X
H
X
X = Don’t care
LOGIC DIAGRAM
PIN 16=V
CC
PIN 8 = GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IN74ACT174D | SMD RES 845 KOHM 1/10W 1% (0805) |
| IN74ACT174N | HEX D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT175 | Quad D Flip-Flop with Common Clock and Reset |
| IN74ACT175D | Quad D Flip-Flop with Common Clock and Reset |
| IN74ACT175N | Quad D Flip-Flop with Common Clock and Reset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IN74ACT174D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:HEX D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT174N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:HEX D FLIP-FLOP WITH COMMON CLOCK AND RESET |
| IN74ACT175 | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad D Flip-Flop with Common Clock and Reset |
| IN74ACT175D | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad D Flip-Flop with Common Clock and Reset |
| IN74ACT175N | 制造商:INTEGRAL 制造商全稱:INTEGRAL 功能描述:Quad D Flip-Flop with Common Clock and Reset |
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